Publications by Jean-Michel Sallese

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In this paper an analytical non-quasi-static (NQS) model for long-channel symmetric double-gate junctionless field-effect transistors (JLFETs) operating in depletion mode is proposed for the first time. The model addresses the limitations of existing DC an ...

In this paper, we validate the Verilog-A implementation of the nanowire ISFET model. Based on the developed code and EKV formalism, the flicker noise of the nanowire ISFET was studied. The Verilog-A code was validated by comparing the data obtained from th ...

A quantum dot device (100) for use as a qubit in a quantum computer is disclosed, comprising a channel region (106), a source region (108), a drain region (110), and at least two primary gate regions (120, 122, 124), wherein the at least two primary gate regions (120, 122, 124) are respectively provided with a main direction of extension (126, 128, 130) and disposed on a first surface of the channel region (106), and wherein the respective main directions of extension of the at least two primary gate region

We report on the realization of InGaAs-lnGaAsP separate confinement heterostructure multiple quantum well lasers grown by chemical beam epitaxy. We discuss key growth parameters and characterization by secondary-ion mass spectroscopy, transmission electron microscopy, electron-beam-induced current, and x-ray diffraction. Threshold current densities as low as 450 A/cm(2) are obtained on lasers with five strained InGaAs quantum wells, along with internal quantum efficiencies of 90% and optical losses of 5 cm(

In this brief, we evidence the link between planar and cylindrical junctionless FETs from the electrostatics point of view. In particular, we show that an approximate solution of the Poisson-Boltzmann equation for junctionless nanowires can be mapped on th ...

In this paper, we present an analytical semiempirical model of the profile of the channel charge and potential in quasi-ballistic double-gate (DG) MOSFETs. The charge model is based on the premise of separating the charge density in the quasi-ballistic cha ...

This paper presents analytical expressions for channel noise, induced gate noise (IGN), and cross-correlation noise in a long-channel junctionless (JL) double-gate MOSFET. The analytical relationships, which have been derived from a coherent charge-based m ...

In this paper, we report for the first time, assessment on mobility extraction in equilateral triangular gate-all-around Si nanowire junctionless (JL) nMOSFETs with cross-section down to 5 nm. This analysis was performed in accumulation regime, as a first ...

This paper presents an explicit drain current model for the junctionless double-gate metal-oxide-semiconductor field-effect transistor. Analytical relationships for the channel charge densities and for the drain current are derived as explicit functions of ...

In this paper, we propose a new method to extract the free carrier mobility in junctionless (JL) double-gate FETs biased in accumulation. We show that, in addition to assuming a well-defined field-dependent mobility law, using the well-known Y-function is ...

In this paper, we present an analytical noise modeling methodology for lateral nonuniform MOSFET. We demonstrate that the noise properties of lateral nonuniform MOSFETs are considerably different from the prediction obtained with the conventional Klaassen- ...

This paper proposes a CMOS based process for Vertical Slit Field Effect Transistors. The central part of the device, namely, the vertical slit, is defined by using electron beam lithography and silicon dry etching. In order to verify the validity and the r ...

This paper aims to model asymmetric operation in double gate junctionless FETs. Following a rigorous approach, we find that asymmetric operation can be simulated by combining two symmetric junctionless FETs, what we call the virtual symmetric device concep ...

This paper presents a new and simple compact model for the intrinsic metal oxide semiconductor (MOS) transistor, which accurately takes into account the non quasistatic (NQS) effects. This is done without any additional assumption or simplification than those required in the derivation of the classical description of the MOS channel charge. Moreover, the model is valid from weak to strong inversion and nonsaturation to saturation. The theoretical results are in very good agreement with measured data perform

This work reports on gate voltage dependent source and drain series resistance and associated barrier height in modified Double Gate Schottky MOSFETs with dopant segregation. We show that in our devices the series resistances is significantly reduced by lowering the Schottky Barrier Height (SBH). The series resistance and the barrier have been extracted using an external series resistance method and Arrhenius plots, respectively. Series resistances as low as 400 Omega.mu m for V-G>V-T and SBH of 0.1eV at V-

Standard techniques used for measuring the photocurrent of an SOI phototransistor have failed due to two main reasons: the first being the low signal-to-noise ratio and the second being the slow transient. In this paper, the partially depleted silicon on i ...

In this article, an analytical predictive model of interface charge traps in symmetric, long-channel double-gate, junctionless transistors (JLTs) is proposed based on a charge-based model. Interface charge traps arising from exposure to chemicals, high-ene ...

In this paper, we propose to derive an analytical model for the doped symmetric double-gate (DG) MOSFET that is valid in all regions of operation. We show that doping the silicon channel can be converted in an equivalent silicon thickness and threshold vol ...

In the framework of monolithic silicon radiation detectors, a fabrication process based on a recently developed silicon wafer bonding technique at low temperature was proposed. Ideally, this new process would enable direct bonding of a read-out electronic ...

The influence of various heat treatments on the corrosion behavior of a novel iron-based shape memory alloy (Fe-SMA), Fe-17Mn-6Si-10Cr-4Ni-1(V,C), used as prestressing elements in civil engineering was examined through electrochemical corrosion methods. SM ...

Jean-Michel Sallese

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Non Quasi-Static Model of DG Junctionless FETs

Nanowire junctionless ISFET noise model in Verilog-A

Field-effect transistor element and quantum computer device

Chemical Beam Epitaxy of 1.55-Mu-M Separate-Confinement Heterostructure Multiple-Quantum-Well Laser-Diodes

A Common Core Model for Junctionless Nanowires and Symmetric Double Gate FETs

Modeling the Channel Charge and Potential in Quasi-Ballistic Nanoscale Double-Gate MOSFETs

Modeling Channel Thermal Noise and Induced Gate Noise in Junctionless FETs

Mobility Extraction Assessment in GAA Si NW JL FETs with Cross-Section Down to 5 nm

Explicit drain current model of junctionless double-gate field-effect transistors

Carrier Mobility Extraction Methodology in Junctionless and Inversion-Mode FETs

Noise Modeling in Lateral Nonuniform MOSFET

Towards fabrication of Vertical Slit Field Effect Transistor (VeSFET) as new device for nano-scale CMOS technology

Modeling Asymmetric Operation in Double-Gate Junctionless FETs by Means of Symmetric Devices

A Compact Non-Quasi-Static Extension of a Charge-Based MOS Model

Investigation of bias-dependent series resistances and barrier height in Double Gate Schottky MOSFETs

SOI Pixel Based on a Floating Body Partially Depleted MOSFET in a Delta-Sigma Loop

Modeling Interface Charge Traps in Junctionless FETs, Including Temperature Effects

The Equivalent-Thickness Concept for Doped Symmetric DG MOSFETs

Principle and modelling of Transient Current Technique for interface traps characterization in monolithic pixel detectors obtained by CMOS-compatible wafer bonding

Corrosion Behavior of Heat-Treated Fe-Based Shape Memory Alloys