Publications by Yusuf Leblebici

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In this paper, an area-optimized polyphase digital down converter (DDC) architecture is introduced, where the mixers can be completely merged into the polyphase decimation filter under certain conditions. We also introduce an interface architecture, called ...

Three Dimensional (3D) integration, based on through silicon vias (TSV), has the potential to become a key enabling technology for many applications. TSVs are commonly categorized according to their aspect ratio and diameter. An equally important parameter ...

This work reports on a heterogeneous integration of resistive memories into the Back-End-of-the-Line of 180nm standard CMOS foundry chips. A TaOx-based ReRAM technology with materials and processes fully CMOS compatible has been developed and characterized ...

Metal-oxide-based resistive memory devices (ReRAM) are being actively researched as synaptic elements of neuromorphic co-processors for training deep neural networks (DNNs). However, device-level non-idealities are posing significant challenges. In this wo ...

The reliability of systems made of unreliable nanoelectronic devices is discussed in this paper. Massive defect density which may affect future fabrication technologies calls for novel solutions, where spatial redundancy and the voting scheme play a signif ...

In this paper, a CMOS-compatible chip-to-chip 3D integration platform will be presented. The developed technology allows reconstituting a wafer from diced and thinned chips. Then, chip-to-chip bonding and TSV fabrication steps are accomplished in wafer-lev ...

A monolithic process is developed for the fabrication of Si nanowires within thick Si substrates. A combination of anisotropic etch and sidewall passivation is utilized to protect and release Si lines during the subsequent deep etch. An etch depth of 10 mu ...

A new biologically-inspired vision sensor made of one hundred "eyes" is presented, which is suitable for real-time acquisition and processing of 3-D image sequences. This device, named the Panoptic camera, consists of a layered arrangement of approximately ...

This paper proposes a new detection methodology based on memristive-effect registered on silicon nanowire. The nano-wires are fabricated by a lithographic technique that allows precise and selective etching at the nanoscale. The wires are obtained in three ...

A multi-camera hemispherical very wide field of view imaging apparatus with omnidirectional illumination capability comprises a cylindrical body (4, 4.a, 4.b), a hemispherical mechanical frame (2) arranged on one end of the cylindrical body (4, 4.a, 4.b), ...

This paper describes the design and semi-automated generation of a MOS current-mode logic standard cell library. A set of generic components implementing a wide range of combinational and sequential functions is proposed. The layout of the generic componen ...

Integration of silicon nanowires (Si NWs) in three-dimensional (3D) devices including integrated circuits (ICs) and microelectromechanical systems (MEMS) leads to enhanced functionality and performance in diverse applications. The immediate challenge to th ...

Understanding the origins of intrinsic stress in Si nanowires (NWs) is crucial for their successful utilization as transducer building blocks in next-generation, miniaturized sensors based on nanoelectromechanical systems (NEMS). With their small size lead ...

In this letter we report on the fabrication and characterization of titanium dioxide (TiO2)-based resistive RAM (ReRAM) co-integration with 380 ìm-height Cu Through Silicon Via (TSV) arrays for programmable 3D interconnects. Nonvolatile resistive switching ...

Complementary metal oxide semiconductor (CMOS) image sensors are more compatible than charge coupled devices (CCDs) for lab-on-a-chip platforms due to their inherited advantages. However, without the noise reduction circuits, CMOS technology wouldn’t be able to compete with CCDs. Today, correlated double sampling circuits (CCDs) are used in all CMOS imagers in order to remove the reset noise and the fixed pattern noise. However, these circuits immensely decrease the fill factor of the image sensors because

Silicon nanowire-based sensors find many applications in micro- and nano-electromechanical systems, thanks to their unique characteristics of flexibility and strength that emerge at the nanoscale. This work is the first study of this class of micro- and na ...

Recent high-density CMOS-based MEAs contain thousands of electrodes. Hence, an off-chip acquisition system performing data compression prior to visualization and analysis on a computer is required in order to handle the large amount of data generated by ac ...

A 7.5 Gb/s mixed NRZ/multi-tone transceiver for multi-drop bus (MDB) memory interfaces is designed and fabricated in 40 nm CMOS technology. Reducing the complexity of the equalization circuitry on the receiver (RX) side, the proposed architecture achieves 1 pJ/bit link efficiency for a MDB channel with 45 dB loss at 2.5 GHz. The transmitted spectrum is composed of baseband (BB) and I /Q sub-bands with the ability to match the modulation frequency of the entire transceiver (TRX) with respect to the channel r

There is a need to improve the modelling capabilities of SystemC-AMS concerning conservative continuous time systems involving the interaction of several physical domains and the interaction with digital control components. Bond graphs unify the description of multi-domain systems by modelling the energy flow between the electrical and non-electrical components. They integrate well with block diagrams describing the signal processing part of a system. It is proposed to develop an extension to the current Sy

Intracranial EEG information used for epilepsy surgery has been provided from large widely spaced electrodes over a narrow bandwidth. However, over the last decades, research on animal and more recently on human, promoted by increased interest in developing high-density microelectrode arrays (MEA), has opened new windows for the comprehension of seizure origin and propagation at a submillimeter scale. From an electrophysiological perspective MEA demonstrate to be able to record local field potentials record

Yusuf Leblebici

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Design optimization of polyphase digital down converters for extremely high frequency wireless communications

Fabrication and characterization of wafer-level deep TSV arrays

Heterogeneous Integration of ReRAM Crossbars in 180nm CMOS BEoL Process

Multi-ReRAM synapses for artificial neural network training

Fault-Tolerance and Reliability of Post-CMOS Systems: a Circuit Perspective

A CMOS Compatible Chip-to-Chip 3D Integration Platform

Monolithic Fabrication of Silicon Nanowires Bridging Thick Silicon Structures

The PANOPTIC Camera: A Plenoptic Sensor with Real-Time Omnidirectional Capability

Memristive-Biosensors: A New Detection Method by Using Nanofabricated Memristors

Large Field of View Multi-Camera Endoscopic Apparatus with Omni-Directional Illumination

Semi-Automated Design of a MOS Current Mode Logic Standard Cell Library from Generic Components

Monolithic technology for silicon nanowires in high-topography architectures

Effect of Native Oxide on Stress in Silicon Nanowires: Implications for Nanoelectromechanical Systems

Resistive Programmable Through Silicon Vias for Reconfigurable 3D Fabrics

A Switched Capacitor Fully Differential Correlated Double Sampling Circuit for CMOS Image Sensors

Real- and Q-space travelling: multi-dimensional distribution maps of crystal-lattice strain (epsilon(044)) and tilt of suspended monolithic silicon nanowire structures

Delta Compression of Neural Recordings for High-density CMOS-based Microelectrode Arrays

Hybrid NRZ/Multi-Tone Serial Data Transceiver for Multi-Drop Memory Interfaces

Proposal to Extend SystemC-AMS with a Bond Graph Based Model of Computation

The Future of Intracranial EEG Recording in Epilepsy: a Technological Issue?