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Michail Zervas

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Related publications (30)

Please note that this is not a complete list of this person’s publications. It includes only semantically relevant works. For a full list, please refer to Infoscience.

People doing similar research (1)

Demetri Psaltis

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People doing similar research (1)

Demetri Psaltis

Related publications (30)

Please note that this is not a complete list of this person’s publications. It includes only semantically relevant works. For a full list, please refer to Infoscience.

Vertically-stacked gate-all-around polysilicon nanowire FETs with sub-μm gates patterned by nanostencil lithography

Giovanni De Micheli, Yusuf Leblebici, Jürgen Brugger, Andreea Veronica Savu, Davide Sacchetto, Michail Zervas, Shenqi Xie

We report on the top-down fabrication of vertically-stacked polysilicon nanowire (NW) gate-all-around (GAA) field-effect-transistors (FET) by means of Inductively Coupled Plasma (ICP) etching and nanostencil lithography. The nanostencil is used to form sub ...

Elsevier2012

Monolithic Integration of Silicon Nanowires With a Microgripper

Yusuf Leblebici, Michail Zervas

Si nanowire (NW) stacks are fabricated by utilizing the scalloping effect of inductively coupled plasma deep reactive ion etching. When two etch windows are brought close enough, scallops from both sides will ideally meet along the dividing centerline of t ...

Institute of Electrical and Electronics Engineers2009

Integration of Intra Chip Stack Fluidic Cooling using Thin-Layer Solder Bonding

Yusuf Leblebici, John Richard Thome, Michail Zervas, Yassir Madhour

Three-dimensional (3D) stacking of integrated circuit (IC) dies by vertical integration increases system density and package functionality. The vertical integration of IC dies by area-array Through-Silicon-Vias (TSVs) reduces the length of global interconn ...

IEEE2013