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Yusuf Leblebici

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Related publications (405)

Enhanced Compressed Look-up-Table Based Real-Time Rectification Hardware

Alexandre Schmid, Yusuf Leblebici, Abdulkadir Akin, Luis Manuel Gaemperle, Halima Najibi

Real-time disparity estimation requires real-time rectification which involves solving the models of lens distortions, image translations and rotations. Low complexity look-up-table based rectification algorithms usually require an external memory to store ...

Springer-Verlag Berlin2015

Analysis and Characterization of Variability in Subthreshold Source-Coupled Logic Circuits

Alexandre Schmid, Yusuf Leblebici, Seyed Armin Tajalli, Mahsa Shoaran

This article explores the effect of device parameter variations on the performance of subthreshold source-coupled logic (STSCL) circuits. A test chip has been fabricated in a standard CMOS 90 nm technology to study the matching properties of STSCL circuits ...

2015

Cmos compatible non-volatile latch and d-flip flop using resistive switching materials

Yusuf Leblebici, Davide Sacchetto, Tugba Demirci

A non-volatile latch circuitry, comprising a Re RAM cell configured to store a final value of the non-volatile latch circuitry; a data selection circuitry configured to connect or disconnect a data input to a plus voltage node and a minus voltage node of t ...

2014

Top-Down Fabrication of Gate-All-Around Vertically-Stacked Silicon Nanowire FETs with Controllable Polarity

Yusuf Leblebici, Giovanni De Micheli, Michele De Marchi, Davide Sacchetto, Jian Zhang, Pierre-Emmanuel Julien Marc Gaillardon

Asthe currentMOSFET scaling trend is facing strong limitations, technologies exploiting novel degrees of freedom at physical and architecture level are promising candidates to enable the continuation of Moore's predictions. In this paper, we report on the ...

Institute of Electrical and Electronics Engineers2014

Graphene Field Effect Devices Operating in Differential Configuration

Yusuf Leblebici, Clemens Benedict Nyffeler, Davide Sacchetto

After decades of miniaturization and performance tuning, Silicon electronics is approaching its technological limits. In the search for alternative transistor channel materials, Graphene has been given much attention since its discovery in 2004, mainly bec ...

2014

Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design

Yusuf Leblebici, Pascal Andreas Meinerzhagen, Giovanni De Micheli, Davide Sacchetto, Andreas Peter Burg, Pierre-Emmanuel Julien Marc Gaillardon

The total power budget of Ultra-Low Power (ULP) VLSI Systems-on-Chip (SoCs) is often dominated by the leakage power of embedded memories as well as status registers. On the one hand, supply voltage scaling down to the near-threshold (near-VT

Institute of Electrical and Electronics Engineers2014

Review of Advances in Neural Networks: Neural Design Technology Stack

Yusuf Leblebici, Stanislaw Andrzej Wozniak

2014

Low Power 3D Serial TSV Link for High Bandwidth Cross-Chip Communication

Yusuf Leblebici, Giovanni De Micheli, Alessandro Cevrero, Giulia Beanato

3D-ICs based on TSV technology provide high bandwidth inter-chip connections. The drawback is that most of the existing TSVs consume a large amount of silicon real estate. We present circuit-level design and analysis of area efficient, low power, high-data ...

2014

Design and characterization of micromachined sensor array integrated with CMOS based optical readout

Yusuf Leblebici, Yüksel Temiz, Refik Burak Erarslan, Ulas Adiyan

This paper reports a micro electro-mechanical system (MEMS) based sensor array integrated with CMOS-based optical readout. The integrated architecture has several unique features. MEMS devices are passive and there are no electrical connections to the MEMS ...

Elsevier2014

MoS2 Transistors Operating at Gigahertz Frequencies

Yusuf Leblebici, Andras Kis, Clemens Benedict Nyffeler, Dominik Sebastian Lembke, Daria Krasnozhon

The presence of a direct band gap1-4 and an ultrathin form factor5 has caused a considerable interest in two-dimensional (2D) semiconductors from the transition metal dichalcogenides (TMD) family with molybdenum disulfide (MoS2) being the most studied repr ...

American Chemical Society (ACS)2014

Configurable Logic Gates Using Polarity Controlled Silicon Nanowire Gate-All-Around FETs

Yusuf Leblebici, Giovanni De Micheli, Michele De Marchi, Davide Sacchetto, Jian Zhang, Pierre-Emmanuel Julien Marc Gaillardon

This work demonstrates the first fabricated 4-transistor logic gates using polarity-configurable, gate-all- around silicon nanowire transistors. This technology enhances conventional CMOS functionality by adding the degree of free- dom of dynamic polarity ...

Institute of Electrical and Electronics Engineers2014

A 110mW 6 Bit 36GS/S Interleaved SAR ADC for 100 GBE Occupying 0.048mm2 in 32nm SOI CMOS

Yusuf Leblebici, Lukas Kull, Thomas Toifl

An area- and power-optimized asynchronous 32x interleaved SAR ADC achieving 36 GS/s at 110mW and 1V supply on the interleaver and 0.9V on the SAR ADCs is presented. The ADC features a 2-channel interleaver with data demultiplexing for enhanced bandwidth, a ...

2014

CMOS-Integrated Photodetectors for Neuromorphic and Smart Imaging Applications: a Low-Cost Design and Measurement Method

Alexandre Schmid, Yusuf Leblebici, Nikola Katic

2014

Heterogeneous integration of ReRAM crossbars in a CMOS foundry chip

Yusuf Leblebici, Giovanni De Micheli, Alessandro Cevrero, Davide Sacchetto, Jury Sandrini, Pierre-Emmanuel Julien Marc Gaillardon, Tugba Demirci

In this paper, we present a heterogeneous integration of ReRAMs with standard CMOS technology by post-processing the Back-End-of-the-Line (BEOL) of fully finished CMOS chips. ...

2014

A 5.43-μW 0.8-V Subthreshold Current-Sensing Σ∆ Modulator for Low-Noise Sensor Interfaces

Alexandre Schmid, Yusuf Leblebici, Seyed Armin Tajalli, Nikola Katic

A micro-watt power subthreshold current modulator suitable for low-power and low-noise sensor interfaces is presented. The prototype design is based on Subthreshold Source Coupled Logic (STSCL) cells and implemented in a 0.18 μm standard CMOS technology. T ...

2014

A 90GS/s 8b 667mW 64x Interleaved SAR ADC in 32nm Digital SOI CMOS

Yusuf Leblebici, Lukas Kull, Thomas Toifl

A 90GS/s 8b low-power ADC is presented achieving 33.0-36.0dB SNDR and a FoM of 203fJ/conversion-step. High conversion speed of up to 100GS/s and high input bandwidth of 22GHz is achieved by using a 1:64 interleaver with integrated sampling. Single NMOS tra ...

2014

Parallel vs. Serial Inter-plane communication using TSVs

Yusuf Leblebici, Giovanni De Micheli, Somayyeh Rahimian Omam

3-D integration is a promising prospect for implementing high performance multifunctional systems-on- chip. Through Silicon Vias (TSVs) are the enablers for achieving high bandwidth paths in inter-plane communications. TSVs also provide higher vertical lin ...

2014

A Die-Level Post-CMOS Processing Protocol for Multi-Layer 3D Integration

Yusuf Leblebici, Clemens Benedict Nyffeler, Davide Sacchetto, Seniz Esra Küçük

In this work, a chip-level post-CMOS processing protocol for 3D integration is presented to achieve multilayer stacking. This protocol includes TSV formation on the top chip, bonding the chips on top of each other, and finally the electrical connection pro ...

2014

An Immersive Telepresence System using a Real-Time Omnidirectional Camera and a Virtual Reality Head-Mounted Display

Yusuf Leblebici, Vladan Popovic, Luis Manuel Gaemperle, Kerem Seyid

2014

Dynamically adaptive real-time disparity estimation hardware using iterative refinement

Alexandre Schmid, Yusuf Leblebici, Abdulkadir Akin, Ipek Baz

The computational complexity of disparity estimation algorithms and the need of large size and bandwidth for the external and internal memory make the real-time processing of disparity estimation challenging, especially for High Resolution (HR) images. Thi ...

2014

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