Roger HerschRoger D. Hersch is professor of Computer Science and head of the Peripheral Systems Laboratory at EPFL. He received his engineering degree from ETHZ in 1975, worked in industry from 1975 to 1980, and obtained his PhD degree from EPFL in 1985. He directed the widely known
Visible Human Web Server project
, which offers a number of services for the visualization of human anatomy.
His current research focuses on color reproduction, spectral color prediction models, moiré imaging, and visual document security. Recent achievements include the PhotoProtect technology, which incorporates text as chromatic differences in order to protect identity photographs (Swiss driving license), microstructure imaging, which is used by railways companies (SNCF, RENFE) and festival organizers (Paleo) to print tickets at home and the band moire imaging technology for the protection of security documents.
James Richard LarusEnseignement et PhD A dirigé les thèses EPFL de Stuart Anthony Byma, David Teksen Aksun, Sahand Kashani A co-dirigé les thèses EPFL de Adrien Ghosn, Seyedmahyar Emami
Marco MattavelliEnseignement et PhD A dirigé les thèses EPFL de Christophe Clerc, Ruohua Zhou, Beilu Shao, Christophe Lucarz, Richard Thavot, Ab Al Hadi Bin Ab Rahman, Endri Bezati, Simone Casale Brunet, Malgorzata Michalska, Ana Angelica Hernandez Lopez, Aurélien Bloch, Mustafa Besirli, Ünsal Öztürk A co-dirigé les thèses EPFL de Sylvain Aguirre Cours Systems and architectures for signal processing EE-555 Etude des composants essentiels eessentiels et des technologies des systèmes de traitements des signau
Giovanni De MicheliExpertise
Technologies de conception pour les systèmes intégrés, tels que la synthèse, le codesign de HW/SW et la conception de basse puissance. Technologies de conception des systèmes sur les plateformes hétérogènes comprenant les composants électriques, et biologiques.
En savoir plus
Consulter svp http://si2.epfl.ch/~demichel/
Enseignement et PhD A dirigé les thèses EPFL de Abhishek Garg, Mohamed Haykel Ben Jamaa, Francesco Zanini, Ciprian Seiculescu, Cristina Boero, Hu Xu, Andrea Cavallini, Shashi Kanth Patrick ThiranPatrick Thiran is a full professor in network and systems theory at the School of Computer and Communication Sciences at EPFL. He holds an electrical engineering degree from the Université Catholique de Louvain, Louvain-la-Neuve, Belgium, an M.Sc. degree in electrical engineering from the University of California at Berkeley, USA, and he received the PhD degree from EPFL, in 1996. He became an adjunct professor in 1998, an assistant professor in 2002, an associate professor in 2006 and a full professor in 2011. He was with Sprint Advanced Technology Labs in Burlingame, California, in 2000-01.
His research interests are in communication and social networks, performance analysis and stochastic models. He is currently active in the analysis and design of wireless and PLC networks (scaling laws, medium access control), in network monitoring (network tomography, multi-layer networks), and data-driven network science. He also contributed to network calculus and to the theory of locally coupled neural networks and self-organizing maps.
He served as an associate editor for the IEEE Transactions on Circuits and Systems in 1997-99 and for the IEEE/ACM Transactions on Networking in 2006-10. He is currently on the editorial board of the IEEE Journal on Selected Areas in Communication. He is/was on the program committee of different conferences in networking, including ACM Sigcomm, Sigmetrics, IMC, CoNext and IEEE Infocom. He was TPC chair of AMC IMC 2011 and CoNext 2012. He is a Fellow of the Belgian American Educational Foundation and of the IEEE. He received the 1996 EPFL Doctoral Prize and the 2008 Crédit Suisse Teaching Award.
Lucia-Nieves Garcia de Jalon OyarzunLucía Jalón Oyarzun is an architect and researcher. She graduated from the ETSAM School of Architecture of Madrid where she also obtained a Master in Advanced Architectural Projects and defended her PhD “Exception and the rebel body: the political as generator of a minor architecture” in 2017. Since 2010 she was a researcher at the Cultural Landscape Research Group at Universidad Politécnica de Madrid, and since 2019 she is a post-doc and Head of Research at ALICE (Atelier de la Conception de l'Espace)/EPFL. where she continues her interdisciplinary research on the conflict between the spatial forms used by politics and the exception, and the commons created by the rebel body, through a historical, political and philosophical reading of secrecy and clandestinity as spatial compositions under capitalism, the anaesthetic effects of the new attentional regimes on the body’s spatial capabilities, landscape as affective image and its media and infrastructural definition and architectural ethnography and the map as an instrument of (dis)orientation. She has taught for several years at the ETSAM School of Architecture of Madrid, and has been invited to several international universities. From 2017 to 2020 she was Director of Academic Affairs at Escuela SUR, a postgraduate interdisciplinary art program in Círculo de Bellas Artes, Madrid. In 2018 she curated the exhibition "4R Resistencia, Rebeldía, Revuelta, Revolución", a genealogy of revolt through art and culture, and her work, ranging from scientific production to cultural critique, has been published in several journals and publications.
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
Babak FalsafiEnseignement et PhD Doctorant·es actuel·les Yuanlong Li, Simla Burcu Harma, Shashwat Shrivastava, Alexandros Poupakis, Shanqing Lin, Ayan Chakraborty, Pooria Poorsarvi Tehrani, Ali Ansari A dirigé les thèses EPFL de Pejman Lotfi Kamran, Sotiria Fytraki, Dejan Novakovic, Stavros Volos, Djordje Jevdjic, Ilknur Cansu Kaynak, Yusuf Onur Koçberber, Javier Picorel Obando, Alexandros Daglis, Mario Paulo Drumond Lages De Oliveira, Arash Pourhabibi Zarandi, Mark Johnathon Sutherland, Siddharth Gupta, Ognjen Glamoc
David Atienza AlonsoDavid Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.
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