Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
Giovanni De MicheliExpertise
Technologies de conception pour les systèmes intégrés, tels que la synthèse, le codesign de HW/SW et la conception de basse puissance. Technologies de conception des systèmes sur les plateformes hétérogènes comprenant les composants électriques, et biologiques.
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Enseignement et PhD A dirigé les thèses EPFL de Abhishek Garg, Mohamed Haykel Ben Jamaa, Francesco Zanini, Ciprian Seiculescu, Cristina Boero, Hu Xu, Andrea Cavallini, Shashi Kanth Pasquale Davide SchiavoneEnseignement et PhD Cours Design technologies for integrated systems CS-472 La synthèse hardware est le processus de transformation - itérativement raffiné, détaillé et optimisé - d'une représentation faite en langage de description matérielle en un circuit. Ce cours présente les algorithmes, outils et méthodes de la compilation matérielle et de la synthèse logique.
Babak FalsafiEnseignement et PhD Doctorant·es actuel·les Yuanlong Li, Simla Burcu Harma, Shashwat Shrivastava, Alexandros Poupakis, Shanqing Lin, Ayan Chakraborty, Pooria Poorsarvi Tehrani, Ali Ansari A dirigé les thèses EPFL de Pejman Lotfi Kamran, Sotiria Fytraki, Dejan Novakovic, Stavros Volos, Djordje Jevdjic, Ilknur Cansu Kaynak, Yusuf Onur Koçberber, Javier Picorel Obando, Alexandros Daglis, Mario Paulo Drumond Lages De Oliveira, Arash Pourhabibi Zarandi, Mark Johnathon Sutherland, Siddharth Gupta, Ognjen Glamoc
Ayatallah Ahmed Gamal Kamal ElakhrasExpertise
Dataflow ArchitectureHigh-Level Synthesis
Ayatallah is a Ph.D. student in the Processor Architecture Laboratory, advised by Professor Paolo Ienne. Between October 2023 and March 2024, she did an internship at AMD in the Research and Advanced Development team, under the supervision of Dr. Kristof Denolf. She received a B.Sc. degree in Computer Engineering from the American University in Cairo, Egypt in 2020 and started her Ph.D. in the same year.Her research interests include dataflow architecture,
Viktor KuncakViktor Kunčak joined EPFL in 2007, after receiving a PhD degree from MIT. Since then has been leading the Laboratory for Automated Reasoning and Analysis and supervised at least 12 completed PhD theses. His works on languages, algorithms and systems for verification and automated reasoning. He served as an initiator and one of the coordinators of a European network (COST action) in the area of automated reasoning, verification, and synthesis. In 2012 he received a 5-year single-investigator European Research Council (ERC) grant of 1.5M EUR. His invited talks include those at Lambda Days, Scala Days, NFM, LOPSTR, SYNT, ICALP, CSL, RV, VMCAI, and SMT. A paper on test generation he co-authored received an ACM SIGSOFT distinguished paper award at ICSE. A PLDI paper he co-authored was published in the Communications of the ACM as a Research Highlight article. His Google Scholar profile reports an over-approximate H-index of 38. He was an associate editor of ACM Transactions on Programming Languages and Systems (TOPLAS) and served as a co-chair of conferences on Computer-Aided Verification (CAV), Formal Methods in Computer Aided Design (FMCAD), Workshop on Synthesis (SYNT), and Verification, Model Checking, and Abstract Interpretation (VMCAI). At EPFL he teaches courses on functional and parallel programming, compilers, and verification. He has co-taught the MOOC "Parallel Programming" that was visited by over 100'000 learners and completed by thousands of students from all over the world.
Patrick ThiranPatrick Thiran is a full professor in network and systems theory at the School of Computer and Communication Sciences at EPFL. He holds an electrical engineering degree from the Université Catholique de Louvain, Louvain-la-Neuve, Belgium, an M.Sc. degree in electrical engineering from the University of California at Berkeley, USA, and he received the PhD degree from EPFL, in 1996. He became an adjunct professor in 1998, an assistant professor in 2002, an associate professor in 2006 and a full professor in 2011. He was with Sprint Advanced Technology Labs in Burlingame, California, in 2000-01.
His research interests are in communication and social networks, performance analysis and stochastic models. He is currently active in the analysis and design of wireless and PLC networks (scaling laws, medium access control), in network monitoring (network tomography, multi-layer networks), and data-driven network science. He also contributed to network calculus and to the theory of locally coupled neural networks and self-organizing maps.
He served as an associate editor for the IEEE Transactions on Circuits and Systems in 1997-99 and for the IEEE/ACM Transactions on Networking in 2006-10. He is currently on the editorial board of the IEEE Journal on Selected Areas in Communication. He is/was on the program committee of different conferences in networking, including ACM Sigcomm, Sigmetrics, IMC, CoNext and IEEE Infocom. He was TPC chair of AMC IMC 2011 and CoNext 2012. He is a Fellow of the Belgian American Educational Foundation and of the IEEE. He received the 1996 EPFL Doctoral Prize and the 2008 Crédit Suisse Teaching Award.
Imad AadMasters in Computer Networks, University of Nice Sophia-Antipolis, France. Ph.D. in Computer Networks, INRIA and Uni. Joseph Fourier, Grenoble, France.He did privacy-related research at INRIA, EPFL, docomo, Nokia, and University of Bern. Worked on applying PETs in Big Data projects at Swisscom, then privacy analysis at the Swiss Federal Data Protection and Information Commissionner (EDÖB). Now he's managing digital trust-related projects at the Center for Digital Trust, C4DT - EPFL, Switzerland.
Michaël UnserExpertise
Image Processing Medical Imaging Biological Imaging Wavelets Splines Multiresolution
Enseignement et PhD Doctorant·es actuel·les Youssef Haouchat, Vincent Patrick Lawrence Guillemet, Bassam El Rawas, Stanislas Ducotterd, Mehrsa Pourya, Zhiyuan Hu A dirigé les thèses EPFL de Stefan Horbelt, Jan Kybic, Maria Arrate Munoz Barrutia, Manuela Feilner, Slavica Jonic, Mathews Jacob, Michael Liebling, Michael Sühling, Muthuvel Arigovindan, François Aguet, Cédric Vonesch, Ildar Khalidov, Sathish Ramani, F
