Andreea Veronica Savu

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The development of nanoscale lithographic methods on polymer materials is a key requirement to improve the spatial resolution and performance of flexible devices. Here, we report the fabrication of metallic nanostructures down to 20 and 50 nm in size on po ...

Chemical Beam Vapour Deposition is a gas phase deposition technique, operated under high vacuum conditions, in which evaporated chemical precursors are thermally decomposed on heated substrates to form a film. In the particular equipment used in this work, ...

We report on the top-down fabrication of vertically-stacked polysilicon nanowire (NW) gate-all-around (GAA) field-effect-transistors (FET) by means of Inductively Coupled Plasma (ICP) etching and nanostencil lithography. The nanostencil is used to form sub ...

Stencil lithography is used here for the fabrication of bismuth nanowires using thermal evaporation. This technique provides good electrical contact resistance by having the nanowire structure and the contact pads deposited at the same time. It has also th ...

In this paper, we study the localized deposition of ZnO micro and nanostructures deposited by non-reactive rf-magnetron sputtering through a stencil mask on ultra-thin (10 nm) SiO2 layers containing a single plane of silicon nanocrystals (NCs), synthetized ...

We report on a fully CMOS compatible fabrication method for ambipolar silicon nanowire FinFETs. The low thermal budget processing, compatible with monolithic 3D device integration, makes use of low pressure chemical vapor deposition (LPCVD) of amorphous Si ...

A quantitative analysis of the blurring and its dependence on the stencil-substrate gap and the deposition parameters in stencil lithography, a high resolution shadow mask technique, is presented. The blurring is manifested in two ways: first, the structur ...

Polytetrafluoroethylene (PTFE) is a polymer with remarkable physico-chemical properties which has been used for membrane and biomedical applications [1]. This fluorpolymer is however difficult or cost- inhibiting to pattern with conventional methods with h ...

We present a parallel, full wafer technique for deposition of catalyst on released scanning probe bodies for the growth of individual high aspect-ratio Si nanowire tips. 1-D probes are necessary for imaging high aspect-ratio nano-patterns, such as deep and ...

We report on the patterning and characterization of titanium–gold (Ti–Au) wire test structures on polyethylene naphthalate (PEN), polyethylene terephthalate (PET) and polyimide (PI) substrates. PEN, PET and PI are flexible polymers which can withstand stre ...

We fabricated amorphous silicon n-i-p solar cells with two types of nanopatterned back reflectors using stencil lithography. One reflector type has a plasmonic grating that is embedded in the ZnO layer; the other one has a metallic grating patterned on top ...

We present the fabrication process and electrical characterization of sub-100 nm scale Al nanowires (NWs) fabricated by stencil lithography (SL). We use a stencil with sub- 100 nm wide nanoslits patterned by focused ion beam (FIB) milling. The stencil is a ...

Stencil lithography (SL) is a shadow mask based technique which allows parallel, resistless, micro- and nano-patterning of material through apertures in a membrane (stencil) onto a substrate [1]. The stencils are usually made of LPCVD low-stress SiN due to ...

This paper presents new results on miniaturized organic thin film transistors (TFT) fabricated on a spin coated polyimide (PI) film. Patterning steps, that are vital for the integrity and electrical performances of the organic TFT, were performed using res ...

In this work, nanosphere lithography was integrated with standard microfabrication for the wafer-scale fabrication of silicon nitride (SiN) membranes with arrays of submicrometer holes. A monolayer of polystyrene (PS) beads with a mean diameter of 428 or 5 ...

This work reports on a considerable resolution improvement of micro/nanostencil lithography when applied on full-wafer scale by using compliant membranes to reduce gap-induced pattern blurring. Silicon nitride (SiN) membranes are mechanically decoupled fro ...

The reliable and reproducible fabrication of nanostructures by stencil lithography faces three main challenges: the stability of the thin stencil membranes with nanoapertures, the blurring of the deposited structures, and the clogging of the nanoapertures ...

In this work a double-gate pentacene TFT architecture is presented. The devices are fabricated on a polyimide substrate using three aligned levels of stencil lithography along with standard photolithography, which enable a soft yet well controlled device p ...

We demonstrate a high-resolution implementation of quasi-dynamic stencil lithography based on the integration of a micro-hotplate on the stencil membrane. The stencil design has been tailored so that the thermally actuated membrane reduces the gap between ...

Andreea Veronica Savu

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High-Resolution Resistless Nanopatterning on Polymer and Flexible Substrates for Plasmonic Biosensing Using Stencil Masks

Fabrication of complex oxide microstructures by combinatorial chemical beam vapour deposition through stencil masks

Vertically-stacked gate-all-around polysilicon nanowire FETs with sub-μm gates patterned by nanostencil lithography

Stenciled conducting bismuth nanowires

Structured ZnO-based contacts deposited by non-reactive rf magnetron sputtering on ultra-thin SiO2/Si through a stencil mask

Ambipolar silicon nanowire FETs with stenciled-deposited metal gate

Analysis of the blurring in stencil lithography

Direct polymer patterning by high energy reactive ion beam through stencil masks

Silicon nanowire AFM tips grown on released scanning probe cantilevers from stencil-deposited catalysts

Resistivity Measurements of Gold Wires Fabricated by Stencil Lithography on Flexible Polymer Substrates

Stencil-nanopatterned back reflectors for thin-film amorphous silicon n-i-p solar cells

Sub-100 nm-scale Aluminum Nanowires by Stencil Lithography: Fabrication and Characterization

Robust PECVD SiC membrane made for stencil lithography

Organic Thin Film Transistors on Flexible Polyimide Substrates Fabricated by Full Wafer Stencil Lithography

SiN membranes with submicrometer hole arrays patterned by wafer-scale nanosphere lithography

Compliant membranes improve resolution in full-wafer micro/nanostencil lithography

Reliable and Improved Nanoscale Stencil Lithography by Membrane Stabilization, Blurring and Clogging Corrections

Stencil-Nanopatterned Back Reflectors for Thin-Film Amorphous Silicon n-i-p Solar Cells

Double-Gate Pentacene TFTs with Improved Control in Subthreshold Region

In-situ actuated gap reduction and clogging-free apertures for quasi-dynamic stencil lithography