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Yusuf Leblebici

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Related publications (405)

Design and Feasibility of Multi-Gb/s Quasi-Serial Vertical Interconnects based on TSVs for 3D ICs

Yusuf Leblebici, Panagiotis Athanasopoulos, Alessandro Cevrero, Fengda Sun

This paper proposes a novel technique to exploit the high bandwidth offered by through silicon vias (TSVs). In the proposed approach, synchronous parallel 3D links are replaced by serialized links to save silicon area and increase yield. Detailed analysis ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2010

Integrating Bio-sensing Functions on CMOS Chips

Yusuf Leblebici, Yüksel Temiz, Enrico Accastelli, Carlotta Guiducci, Anna Ferretti, Giulia Cappi, Elena Bianchi

The paper discusses the recent achievements in the development of chips with integrated sensing of biomolecules. In particular, it focuses on integrated sensing electrodes on silicon and presents innovative solutions for the enhanced robustness of the elec ...

Ieee Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2010

Pin-shape assessment for interlayer-cooled chip stacks with periodic boundary condition modeling

Yusuf Leblebici, Gözde Töral

2010

Nanowatt Range Folding-Interpolating ADC Using Subthreshold Source-Coupled Circuits

Yusuf Leblebici, Seyed Armin Tajalli

A very low power mixed-signal design methodology based on subthreshold source-coupled circuits is presented, and a nano-Watt range analog-to-digital converter (ADC) circuit based on folding-interpolating topology is proposed as a complete design example. T ...

2010

Design Aspects of Carry Lookahead Adders with Vertically-Stacked Nanowire Transistors

Yusuf Leblebici, Giovanni De Micheli, Mohamed Haykel Ben Jamaa, Davide Sacchetto

This paper discusses the newly introduced vertically-stacked silicon nanowire gate-all-around fieldeffect-transistor technology and its advantages for higher density layout design. The vertical nanowire stacking technology allows very-high density arrangem ...

IEEE Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, NJ 08855-1331 USA2010

A (256x256) Pixel 76.7mW CMOS Imager/ Compressor Based on Real-Time In-Pixel Compressive Sensing

Alexandre Schmid, Yusuf Leblebici, Pierre Vandergheynst, Vahid Majidzadeh Bafar, Laurent Jacques

A CMOS imager is presented which has the abil- ity to perform localized compressive sensing on-chip. In-pixel convolutions of the sensed image with measurement matrices are computed in real time, and a proposed programmable two- dimensional scrambling tech ...

IEEE Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, Nj 08855-1331 Usa2010

AVGS-Mux style: A novel technology and device independent technique for reducing power and compensating process variations in FPGA fabrics

Christian Piguet, Yusuf Leblebici, Bahman Kheradmand Boroujeni

2010

A 5.35 mm2 10GBASE-T Ethernet LDPC Decoder Chip in 90 nm CMOS

Paolo Ienne, Yusuf Leblebici, Alessandro Cevrero, Andreas Peter Burg

A partially parallel low density parity check (LDPC) decoder compliant with the IEEE 802.3an standard for 10GBASE-T Ethernet is presented. The design is optimized for minimum silicon area and is based on the layered offset-min-sum algorithm which speeds up ...

2010

Subthreshold Current-Mode Delta-Sigma Quantizer with 3-Decade Scalable Sampling Rate and pico-Ampere Range Resolution

Yusuf Leblebici, Seyed Armin Tajalli

A current-mode

\Delta\Sigma

analog-to-digital data converter (ADC) for biomedical readout front-end systems is being presented. The core of this circuit is a current-controlled ring oscillator (CCO) whose oscillation frequency is proportional to the inpu ...

2010

Selective Redundancy-Based Design Techniques for the Minimization of Local Delay Variations

Alexandre Schmid, Yusuf Leblebici, Milos Stanisavljevic

In this paper a novel approach to optimize digital integrated circuits yield with regards to speed and area/power for aggressive scaling technologies is presented. The technique is intended to reduce the effects of intra-die variations using redundancy app ...

IEEE Service Center2010

Output Probability Density Functions of Logic Circuits: Modeling and Fault-Tolerance Evaluation

Alexandre Schmid, Yusuf Leblebici, Milos Stanisavljevic

The precise evaluation of the reliability of logic circuits has a significant importance in highly-defective and future nanotechnologies. It allows efficient comparison of fault-tolerance techniques, and enables designs improvement with respect to their re ...

IEEE Service Center2010

Delta Compression of Neural Recordings for High-density CMOS-based Microelectrode Arrays

Alexandre Schmid, Yusuf Leblebici, Neil Joye, Michelangelo Carrozzo

Recent high-density CMOS-based MEAs contain thousands of electrodes. Hence, an off-chip acquisition system performing data compression prior to visualization and analysis on a computer is required in order to handle the large amount of data generated by ac ...

2010

Efficient and side-channel-aware implementations of elliptic curve cryptosystems over prime fields

Yusuf Leblebici

Elliptic curve cryptosystems (ECCs) are utilised as an alternative to traditional public-key cryptosystems, and are more suitable for resource-limited environments because of smaller parameter size. In this study, the authors carry out a thorough investiga ...

2010

Extracellular recording system based on amplitude modulation for CMOS microelectrode arrays

Alexandre Schmid, Yusuf Leblebici, Neil Joye

An innovative readout channel, based on analog amplitude modulation of the signals recorded by each sensing site, is developed for high-density CMOS-based microelectrode arrays. A single amplification stage simultaneously records the neural activity acquir ...

2010

Low-distortion switched-capacitor event-driven analogue to-digital converter

Alexandre Schmid, Yusuf Leblebici, Vahid Majidzadeh Bafar

An event-driven analogue-to-digital converter (ADC) architecture is proposed. The proposed architecture has less sensitivity to amplifier and DAC nonlinearity, and reduces the swing and dynamic common-mode range requirement of the operational transconducta ...

Institution of Engineering and Technology2010

CMOS Compressed Imaging by Random Convolution

Alexandre Schmid, Yusuf Leblebici, Pierre Vandergheynst, Vahid Majidzadeh Bafar, Laurent Jacques

We present a CMOS imager with built-in capability to perform Compressed Sensing. The adopted sensing strategy is the random Convolution due to J. Romberg. It is achieved by a shift register set in a pseudo-random configuration. It acts as a convolutive fil ...

2009

Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology

Paolo Ienne, Yusuf Leblebici, Zeynep Toprak Deniz, Francesco Regazzoni

This paper explores the resistance of MOS Current Mode Logic (MCML) against attacks based on the observation of the power consumption. Circuits implemented in MCML, in fact, have unique characteristics both in terms of power consumption and the dependency ...

2009

Leakage Current Reduction Using Subthreshold Source-Coupled Logic

Yusuf Leblebici, Seyed Armin Tajalli

The performance of subthreshold source-coupled logic (STSCL) circuits for ultra-low power applications is explored. It is shown that the power consumption of STSCL circuits can be reduced well below the subthreshold leakage current of static CMOS circuits. ...

2009

Subthreshold Leakage Reduction: A Comparative Study of SCL and CMOS Design

Yusuf Leblebici, Seyed Armin Tajalli

The large subthreshold leakage current of static CMOS logic circuits designed in modern nanometer-scale technologies is one of the main barriers for implementing ultra-low power digital systems. Subthreshold source-coupled logic (STSCL) circuits are based ...

IEEE2009

New probe immobilizations by lipoate-diethalonamine or ethylene-glycol molecules for capacitance DNA chip

Yusuf Leblebici, Giovanni De Micheli, Bruno Samori, Luca Benini, Andrea Cavallini, Sandro Carrara

Label–free DNA detection is of crucial role to when developing point-of-care biochips to be used in personalized therapy. Capacitance detection is a promising technology for label-free DNA detection. However, data published in literature often show evident ...

2009

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