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Yusuf Leblebici

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Related publications (405)

A Widely-Tunable and Ultra-Low-Power MOSFET-C Filter Operating in Subthreshold

Yusuf Leblebici, Seyed Armin Tajalli

A very wide tuning range ultra-low-power MOSFET-C filter is presented. The wide tuning range in this filter has been achieved without using any switchable components or programmable building blocks, and the cutoff frequency of the filter can be adjusted si ...

IEEE2009

A Bio-Inspired Image Processor for Edge Detection with Single-Electron Circuits

Alexandre Schmid, Yusuf Leblebici

2009

Through Silicon Via-Based Grid for Thermal Control in 3D Chips

Yusuf Leblebici, David Atienza Alonso, Vinod Pangracious, José Luis Ayala Rodrigo, Arvind Raj Mahankali Sridhar

3D stacked chips have become a promising integration technology for modern systems. The complexity reached in multi-processor systems has increased the communication delays between processing cores, and an effective way to diminish this impact on communica ...

Springer2009

A Current Sensing Completion Detection Method for Asynchronous Pipelines Operating In the Sub-threshold Regime

Yusuf Leblebici, Omer Can Akgun

Digital circuits operating in the sub-threshold regime are able to perform minimum energy operation at a given delay. In the sub-threshold regime the circuit delay, and hence, the leakage energy consumption depend on the supply voltage exponentially. By re ...

2009

Optimization of Nanoelectronic Systems Reliability by Reducing Logic Depth

Alexandre Schmid, Yusuf Leblebici, Milos Stanisavljevic

2009

A Stochastic Perturbative Approach to Design a Defect-Aware Thresholder in the Sense Amplifier of Crossbar Memories

Yusuf Leblebici, Giovanni De Micheli, David Atienza Alonso, Mohamed Haykel Ben Jamaa

The use of nanowire crossbars to build devices with large storage capabilities is a very promising architectural paradigm for forthcoming nanoscale memory devices. However, this new type of memory devices raises questions regarding how to test their correc ...

ACM/IEEE Press2009

Monolithic Integration of Silicon Nanowires With a Microgripper

Yusuf Leblebici, Michail Zervas, Özgür Özsun, Izzet Yildiz, Mustafa Yilmaz

Si nanowire (NW) stacks are fabricated by utilizing the scalloping effect of inductively coupled plasma deep reactive ion etching. When two etch windows are brought close enough, scallops from both sides will ideally meet along the dividing centerline of t ...

Institute of Electrical and Electronics Engineers2009

Ultra-Low Power 32-bit Pipelined Adder Using Subthreshold Source-Coupled Logic with 5fJ/stage PDP

Yusuf Leblebici, Seyed Armin Tajalli

This article presents a new approach for improving the power-delay performance of subthreshold source-couple logic (STSCL) circuits. Using a simple two-phase pipelining technique, it is possible to increase the activity rate of STSCL gates with negligible ...

2009

A Neuromorphic Single-Electron Circuit for Noise-Shaping Pulse-Density Modulation

Alexandre Schmid, Yusuf Leblebici

2009

Using 3D Integration Technology To Realize Multi-Context Fpgas

Paolo Ienne, Yusuf Leblebici, Maurizio Skerlj, Philip Brisk, Alessandro Cevrero, Hadi Parandeh Afshar

This paper advocates the use of 3D integration technology to stack a DRAM on top of an FPGA. The DRAM will store future FPGA contexts. A configuration is read from the DRAM into a latch array on the DRAM layer while the FPGA executes; the new configuration ...

IEEE Service Center, 445 Hoes Lane, Po Box 1331, Piscataway, NJ 08855-1331 USA2009

On heat transfer at microscale with implications for microactuator design

Yusuf Leblebici, Michail Zervas, Özgür Özsun, Mustafa Yilmaz

The dominance of conduction and the negligible effect of gravity, and hence free convection, are verified in the case of microscale heat sources surrounded by air at atmospheric pressure. A list of temperature-dependent heat transfer coefficients is provid ...

Institute of Physics2009

A cell-electrode interface noise model for high-density microelectrode arrays

Alexandre Schmid, Yusuf Leblebici, Neil Joye

A cell-electrode interface noise model is developed which is dedicated to enable the co-simulation of the cell-electrode electrical characteristics, along with the electronics of novel CMOS-based MEA. The electrode noise is investigated for Pt and Pt black ...

IEEE2009

Analytical and compact models of the ONO capacitance in embedded non-volatile flash devices

Alexandre Schmid, Yusuf Leblebici, Davide Garetto

The floating gate (FG) potential VFG in a non–volatile flash memory (NVM) device is the main parameter controlling the behavior of the cell. A common technique to model VFG is based on the calculation of the coupling coefficients between all the terminals ...

2009

Dynamic Thermal Management in 3D Multicore Architectures

Yusuf Leblebici, David Atienza Alonso, Ayse Kivilcim Coskun, José Luis Ayala Rodrigo

Technology scaling has caused the feature sizes to shrink continuously, whereas interconnects, unlike transistors, have not followed the same trend. Designing 3D stack architectures is a recently proposed approach to overcome the power consumption and dela ...

IEEE and ACM2009

On the Reliability of Post-CMOS and SET Systems

Alexandre Schmid, Yusuf Leblebici, Milos Stanisavljevic

The necessity of applying fault-tolerant techniques to increase the reliability of future nano-electronic systems is an undisputed fact, dictated by the high density of faults that will plague these chips. The averaging and thresholding fault-tolerant tech ...

2009

Improving Power-Delay Performance of Ultra Low-Power Subthreshold SCL Circuits

Yusuf Leblebici, Seyed Armin Tajalli

This article presents a technique for improving the power-delay performance of subthreshold source-coupled logic (SCL) circuits. A source follower buffer stage is used at the output of each SCL stage. Analytical results confirmed by measurements in 0.18um ...

2009

A pulse-density modulation circuit exhibiting noise shaping with single-electron neurons

Alexandre Schmid, Yusuf Leblebici

2009

Fabrication and Characterization of Vertically Stacked Gate-All-Around Si Nanowire FET Arrays

Yusuf Leblebici, Giovanni De Micheli, Mohamed Haykel Ben Jamaa, Davide Sacchetto

We describe the fabrication of vertically stacked Silicon Nanowire Field Effect Transistors (SiNWFETs) in Gate-All Around (GAA) configuration. Stacks with the number of channels ranging from 1 to 12 have been successfully produced by means of a micrometer ...

2009

Optimization of Nanoelectronic Systems Reliability under Massive Defect Density Using Distributed R-Fold Modular Redundancy

Alexandre Schmid, Yusuf Leblebici, Milos Stanisavljevic

The theoretical analysis of R-fold modular redundancy with distributed voters - distributed R-fold modular redundancy in terms of reliability is presented for the first time to the best of author's knowledge. This technique is compared in terms of resistan ...

IEEE Computer Soc Press, Customer Service Center, Po Box 3014, 10662 Los Vaqueros Circle, Los Alamitos, Ca 90720-1264 Usa2009

Improving the power-delay performance in subthreshold source-coupled logic circuits

Yusuf Leblebici, Seyed Armin Tajalli

Subthreshold source-coupled logic (STSCL) circuits can be used in design of low-voltage and ultra-low power digital systems. This article introduces and analyzes new techniques for implementing complex digital systems using STSCL gates with an improved pow ...

Springer2009

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