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Lukas Kull

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Related publications (20)

Please note that this is not a complete list of this person’s publications. It includes only semantically relevant works. For a full list, please refer to Infoscience.

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Related publications (20)

Please note that this is not a complete list of this person’s publications. It includes only semantically relevant works. For a full list, please refer to Infoscience.

Design Techniques for High-Speed Multi-Level Viterbi Detectors and Trellis-Coded-Modulation Decoders

Andreas Peter Burg, Thomas Toifl, Lukas Kull

The implementation of a 25.6-Gb/s four-level pulse-amplitude-modulation (4-PAM) reduced-state sliding-block Viterbi detector (VD) is presented. The power consumption of the VD is 105 orilV at a supply voltage of 0.7 V, corresponding to an energy efficiency ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2018

Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver

Yusuf Leblebici, Alessandro Cevrero, Thomas Toifl, Lukas Kull, Ilter Ozkaya, Gain Kim, Cosimo Aprile

This paper presents a parallel implementation technique of digital equalizer for high-speed wireline serial link receiver (RX). In wireline RX, inter-symbol interference (ISI) is mitigated by continuous-time linear equalizer, and the remaining ISI is cance ...

2018

A 60 Gb/s 1.9 pJ/bit NRZ Optical-Receiver with Low Latency Digital CDR in 14nm CMOS FinFET

Yusuf Leblebici, Alessandro Cevrero, Thomas Toifl, Lukas Kull, Ilter Ozkaya

This work reports a low power implementation of a 60Gb/s NRZ optical receiver (RX) in 14nm bulk CMOS finFET featuring a first-order digital CDR with high jitter tolerance (JTOL). The design includes a single phase-rotator (PR) with low complexity control l ...

2017