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Pierre-Emmanuel Julien Marc Gaillardon

Cette personne a quitté l’EPFL

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Publications associées (117)

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LUT Mapping and Optimization for Majority-Inverter Graphs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù, Winston Jason Haaswijk

A Majority-Inverter Graph (MIG) is a directed acyclic graph in which every vertex represents a three-input majority operation and edges may be complemented to indicate operand inversion. MIGs have algebraic and Boolean properties that enable efficie ...

2016

A Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Jian Zhang, Hassan Ghasemzadeh Mohammadi

This paper deals with the effects of faults on circuits implemented with controllable-polarity transistors. We propose a new fault model that suits the characteristics of these devices, and report the results of a SPICE-based analysis of the effects of fau ...

2016

Vertically Stacked Double Gate Nanowires FETs with Controllable Polarity: From Devices to Regular ASICs

Giovanni De Micheli, Yusuf Leblebici, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, Davide Sacchetto, Shashi Kanth Bobba, Michele De Marchi

Vertically stacked nanowire FETs (NWFETs) with gate-all-around structure are the natural and most advanced extension of FinFETs. At advanced technology nodes, many devices exhibit ambipolar behavior, i.e., the device shows n- and p-type characteristics sim ...

2013

Towards high-performance polarity-controllable FETs with 2D materials, 2018 Design

Giovanni De Micheli, Giovanni Vincenzo Resta, Pierre-Emmanuel Julien Marc Gaillardon

As scaling of conventional silicon-based electronics is reaching its ultimate limit, two-dimensional semiconducting materials of the transition-metal-dichalcogenides family, such as MoS2 and WSe2, are considered as viable candidates for next-generation ele ...

IEEE2018

A Novel FPGA Architecture based on Ultra-Fine Grain Reconfigurable Logic Cells

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang, Gain Kim

In this paper, we investigate the opportunity brought by controllable-polarity transistors to design efficient reconfigurable circuits. Controllable-polarity transistors are devices whose polarity can be electrostatically programmed to be either n- or p-ty ...

Institute of Electrical and Electronics Engineers2015

System Level Benchmarking with Yield-Enhanced Standard Cell Library for Carbon Nanotube VLSI Circuits

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Shashi Kanth Bobba, Jian Zhang, Subhasish Mitra

The quest for technologies with superior device characteristics has showcased Carbon-Nanotube Field-Effect Transistors (CNFET) into limelight. In this work we present physical design techniques to improve the yield of CNFET circuits in the presence of Carb ...

Assoc Computing Machinery2014

Majority-Inverter Graph for FPGA Synthesis

Giovanni De Micheli, Paolo Ienne, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù, David Novo Bruna, Ana Petkovska

In this paper, we present an FPGA synthesis flow based on Majority-Inverter Graph (MIG). An MIG is a directed acyclic graph consisting of three-input majority nodes and regular/complemented edges. MIG manipulation is supported by a consistent alge ...

2015

An MIG-based Compiler for Programmable Logic-in-Memory Architectures

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù

Resistive memories have gained high research attention for enabling design of in-memory computing circuits and systems. We propose for the first time an automatic compilation methodology suited to a recently proposed computer architecture solely based on r ...

Ieee2016

On the Design of a Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Eduardo Sanchez, Jian Zhang, Hassan Ghasemzadeh Mohammadi

This paper first explores the effects of faults on circuits implemented with controllable-polarity transistors. We propose a new fault model that suits the characteristics of these devices, and report the results of a SPICE-based analysis of the effects of ...

IEEE2015

Inversion optimization in majority-inverter graphs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù, Eleonora Testa

Many emerging nanotechnologies realize majority gates as primitive building blocks and they benefit from a majority-based synthesis. Recently, Majority-Inverter Graphs (MIGs) have been introduced to abstract these new technologies. We present optimi ...

Ieee2016

Notes on Majority Boolean Algebra

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù

A Majority-Inverter Graph (MIG) is a homogeneous logic network, where each node represents the majority function. Recently, a logic optimization package based on the MIG data-structure, with 3-input majority node (M3) has been proposed [2], [30]. It is dem ...

IEEE2016

GMS: Generic Memristive Structure for Non-Volatile FPGAs

Giovanni De Micheli, Yusuf Leblebici, Pierre-Emmanuel Julien Marc Gaillardon, Davide Sacchetto, Shashi Kanth Bobba

The invention of the memristor enables new possibilities for computation and non-volatile memory storage. In this paper we propose a Generic Memristive Structure (GMS) for 3-D FPGA applications. The GMS cell is demonstrated to be utilized for steering logi ...

2012

MIXSyn: An Efficient Logic Synthesis Methodology for Mixed XOR-AND/OR Dominated Circuits

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

We present a new logic synthesis methodology, called MIXSyn, that produces area-efficient results for mixed XOR-AND/OR dominated logic functions. MIXSyn is a two step synthesis process. The first step is a hybrid logic optimization that enables selective a ...

2013

Controllable polarity fet based arithmetic and differential logic

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Luca Gaetano Amarù

A logic gate with three inputs A, B, and C, and one output implementing a function MAJ(A,B,C)=AB+BC+A*C comprising two mutually exclusive transmission gates (TGs) connected in series, based on two parallel double-gate controllable polarity devices, a pol ...

2014

Resistive Switching Element and Use Thereof

Giovanni De Micheli, Yusuf Leblebici, Pierre-Emmanuel Julien Marc Gaillardon, Davide Sacchetto, Shashi Kanth Bobba, Tugba Demirci

A bipolar resistive switching device including an electrically conductive bottom electrode, a stack of transition metal oxides layers, a number of transition metal oxide layers being equal or greater than 2, the stack including: at least one MOx layer, at ...

2016

Pattern-Based FPGA Logic Block and Clustering Algorithm

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang

In classical FPGA, LUTs and DFFs are pre-packed into BLEs and then BLEs are grouped into logic blocks. We propose a novel logic block architecture with fast combinational paths between LUTs, called pattern-based logic blocks. A new clustering algorithm is ...

IEEE2014

Wave Pipelining for Majority-based Beyond-CMOS Technologies

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù, Eleonora Testa

The performance of some emerging nanotechnolo- gies benefits from wave pipelining. The design of such circuits re- quires new models and algorithms. Thus we show how Majority- Inverter Graphs (MIG) can be used for this purpose and we extend the related opt ...

2017

Effect of O2 migration in Pt/HfO2/Ti/Pt structure

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Maxime Victor Thammasack

In this paper, we study the post-fabrication phenomenon of natural oxidation of the Ti layer observed in a Pt/HfO2/Ti/Pt Resistive Random Access Memory (OxRRAM) stack with no external influence. We identify that the resistance ratio decreases by ...

Springer Verlag2017

An Efficient Electronic Measurement Interface for Memristive Biosensors

Giovanni De Micheli, Sandro Carrara, Pierre-Emmanuel Julien Marc Gaillardon, Ioulia Tzouvadaki

Reducing sensing time is one major concern in clinical diagnostics. In the present work, a robust measurement system is developed aiming at the faster and easier signal acquisition of memristive biosensors. Sensing chips consisting of nanofabricated silico ...

IEEE2017

Process/Design Co-optimization of Regular Logic Tiles for Double-Gate Silicon Nanowire Transistors

Giovanni De Micheli, Yusuf Leblebici, Davide Sacchetto, Pierre-Emmanuel Julien Marc Gaillardon, Shashi Kanth Bobba, Jian Zhang, Michele De Marchi

Ambipolar transistors with on-line configurability to n-type and p-type polarity are desirable for future integrated circuits. Regular logic tiles have been recognized as an efficient layout fabric for ambipolar devices. In this work, we present a process/ ...

2012