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Pierre-Emmanuel Julien Marc Gaillardon

Cette personne n’est plus à l’EPFL

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Publications associées (119)

A Survey on Low-Power Techniques with Emerging Technologies: From Devices to Systems

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon

Nowadays, power consumption is one of the main limitations of electronic systems. In this context, novel and emerging devices provide us with new opportunities to keep the trend to low-power design. In this survey paper, we present a transversal survey on ...

Assoc Computing Machinery2015

New Logic Synthesis As Nanotechnology Enabler (invited paper)

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Subhasish Mitra

Nanoelectronics comprises a variety of devices whose electrical properties are more complex as compared to CMOS, thus enabling new computational paradigms. The potentially large space for innovation has to be explored in the search for technologies that ca ...

Ieee-Inst Electrical Electronics Engineers Inc2015

The EPFL Combinational Benchmark Suite

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

In this paper, we present the EPFL combinational benchmark suite. We aim at completing existing benchmark suites by focusing only on natively combinational benchmarks. The EPFL combinational benchmark suite consists of 23 combinational circuits desi ...

2015

Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization

Giovanni De Micheli, Sandeep Miryala, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

As an answer to the new electronics market demands, semiconductor industry is looking for different materials, new process technologies and alternative design solutions that can support Silicon replacement in the VLSI domain. The recent introduction of gra ...

ACM2015

From Defect Analysis to Gate-Level Fault Modeling of Controllable-Polarity Silicon Nanowires

Giovanni De Micheli, Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Julien Marc Gaillardon

Controllable-Polarity Silicon Nanowire Transistors (CP-SiNWFETs) are among the promising candidates to complement or even replace the current CMOS technology in the near future. Polarity control is a desirable property that allows the on-line configuration ...

Institute of Electrical and Electronics Engineers2015

Majority logic synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

A method for optimizing an implementation of a logic circuit, comprising steps of providing an interpretation of the logic circuit in terms of 3 Boolean variable majority operators M, with each of the majority operators being a function of a plurality of v ...

2015

Multiple Independent Gate FETs: How Many Gates Do We Need?

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Subhasish Mitra

Multiple Independent Gate Field Effect Transistors (MIGFETs) are expected to push FET technology further into the semiconductor roadmap. In a MIGFET, supplementary gates either provide (i) enhanced conduction properties or (ii) more intelligent sw ...

IEEE2015

NEM Relay Design with Biconditional Binary Decision Diagrams

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Winston Jason Haaswijk

In this paper, we present an improved design flow for nanoelectromechanical (NEM) relay-based combinational logic circuits. Six-terminal NEM relays can be programmed to act as 2-to-1 multiplexers. We can therefore use NEM relays to implement arbitrary comb ...

IEEE2015

A Novel FPGA Architecture based on Ultra-Fine Grain Reconfigurable Logic Cells

Giovanni De Micheli, Gain Kim, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon

In this paper, we investigate the opportunity brought by controllable-polarity transistors to design efficient reconfigurable circuits. Controllable-polarity transistors are devices whose polarity can be electrostatically programmed to be either n- or p-ty ...

Institute of Electrical and Electronics Engineers2015

Majority-Inverter Graph for FPGA Synthesis

Paolo Ienne, Giovanni De Micheli, Ana Petkovska, David Novo Bruna, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

In this paper, we present an FPGA synthesis flow based on Majority-Inverter Graph (MIG). An MIG is a directed acyclic graph consisting of three-input majority nodes and regular/complemented edges. MIG manipulation is supported by a consistent alge ...

2015

On the Design of a Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors

Eduardo Sanchez, Giovanni De Micheli, Hassan Ghasemzadeh Mohammadi, Jian Zhang, Pierre-Emmanuel Julien Marc Gaillardon

This paper first explores the effects of faults on circuits implemented with controllable-polarity transistors. We propose a new fault model that suits the characteristics of these devices, and report the results of a SPICE-based analysis of the effects of ...

IEEE2015

On Temperature Dependency of Steep Subthreshold Slope in Dual-Independent-Gate FinFET

Giovanni De Micheli, Jian Zhang, Pierre-Emmanuel Julien Marc Gaillardon

Dual-independent-gate silicon FinFET has demonstrated a steep subthreshold slope (SS) when a positive feedback induced by weak impact ionization is triggered. In this paper, we study the temperature dependency of the steep SS by characterizing the fabricat ...

2015

Towards Functionality-Enhanced Devices: Controlling the Modes of Operation in Three-Independent-Gate Transistors

Giovanni De Micheli, Michele De Marchi, Jian Zhang, Pierre-Emmanuel Julien Marc Gaillardon

In this paper, we introduce the different modes of operation achievable with Three-Independent-Gate Field-Effect Transistors (TIGFETs) and report results on fabricated devices including: (i) the dynamic reconfiguration of the device polarity; (ii) t ...

2015

Reversible Logic Synthesis via Biconditional Binary Decision Diagrams

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon, Anupam Chattopadhyay

Reversible logic synthesis is an emerging research area to aid the circuit implementation for multiple nano-scale technologies with bounded fan-out. Due to the inherent com- plexity of this problem, several heuristics are proposed in the literature. Among ...

2015

Spintronic Majority Gates

Giovanni De Micheli, Luca Gaetano Amarù, Odysseas Zografos, Pierre-Emmanuel Julien Marc Gaillardon

In this paper we present an overview of two types of majority gate devices based on spintronic phenomena. We compare the spin torque majority gate and the spin wave majority gate and describe work on these devices. We discuss operating conditions for the t ...

2015

Heterogeneous Integration of ReRAM Crossbars in 180nm CMOS BEoL Process

Yusuf Leblebici, Giovanni De Micheli, Davide Sacchetto, Jury Sandrini, Pierre-Emmanuel Julien Marc Gaillardon, Tugba Demirci, Maxime Victor Thammasack

This work reports on a heterogeneous integration of resistive memories into the Back-End-of-the-Line of 180nm standard CMOS foundry chips. A TaOx-based ReRAM technology with materials and processes fully CMOS compatible has been developed and characterized ...

Elsevier2015

Majority-Inverter Graph: A Novel Data-Structure and Algorithms for Efficient Logic Optimization

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

In this paper, we present Majority-Inverter Graph (MIG), a novel logic representation structure for efficient optimization of Boolean functions. An MIG is a directed acyclic graph consisting of three-input majority nodes and regular/complemented e ...

2014

Top-Down Fabrication of Gate-All-Around Vertically-Stacked Silicon Nanowire FETs with Controllable Polarity

Yusuf Leblebici, Giovanni De Micheli, Michele De Marchi, Davide Sacchetto, Jian Zhang, Pierre-Emmanuel Julien Marc Gaillardon

Asthe currentMOSFET scaling trend is facing strong limitations, technologies exploiting novel degrees of freedom at physical and architecture level are promising candidates to enable the continuation of Moore's predictions. In this paper, we report on the ...

Institute of Electrical and Electronics Engineers2014

Data Compression via Logic Synthesis

Giovanni De Micheli, Andreas Peter Burg, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

Nowadays, most software and hardware applications are committed to reduce the footprint and resource usage of data. In this general context, lossless data compression is a beneficial technique that encodes information using fewer (or at most equal number o ...

2014

Unlocking Controllable-Polarity Transistors Opportunities by Exclusive-OR and Majority Logic Synthesis

Giovanni De Micheli, Luca Gaetano Amarù, Pierre-Emmanuel Julien Marc Gaillardon

For more than four decades, Complementary Metal-Oxide- Semiconductor (CMOS) Field Effect Transistors (FETs) have been the baseline technology for implementing digital computation systems. CMOS transistors natively implement Not-AND ...

2014

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