Publications de Giovanni De Micheli

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Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power density, which may lead to thermal runaway if coupled with low-cost packaging and ...

Modern high-performance processors employ ther- mal management systems, which rely on accurate readings of on-die thermal sensors. Systematic tools for analysis and determination of best allocation and placement of thermal sensors is therefore a highly rel ...

Several nanowire technologies have emerged recently, providing a way to continue the scaling down of complementary metal-oxide-semiconductor (CMOS) technology. The opportunities offered at the level of logic circuit design depend on the technology properti ...

New applications demand very high processing power when run on embedded systems. Very Long Instruction Word (VLIW) architectures have emerged as a promising alternative to provide such processing capabilities under the given energy budget. However, in this ...

In this work, we show the realization of a fully-implantable device for monitoring free-moving small animals. The device integrates a microfabricated sensing platform, a coil for power and data transmission and two custom designed integrated circuits. The ...

The study of the complexity of Boolean functions has recently found applications in logic synthesis and optimization algorithms, as for instance in logic rewriting. Previous works have focused on the minimum length of Boolean chains for functions up to 5 i ...

Editor's notes: Emerging computing technologies will enable design of energy-efficient circuits and systems in the future. This article presents a tutorial on the role of emerging technologies in designing green computing systems. -Partha Pratim Pande, Was ...

Emerging reconfigurable nanotechnologies allow the implementation of self-dual functions with a fewer number of transistors as compared to traditional CMOS technologies. To achieve better area results for Reconfigurable Field-Effect Transistors (RFET)-base ...

Universal and fault-tolerant quantum computation is a promising new paradigm that may efficiently conquer difficult computation tasks beyond the reach of classical computation. It motivates the development of various quantum technologies. The rapid progres ...

Nanosystems are large-scale integrated systems exploiting nanoelectronic devices. In this work, we consider double independent gate, vertically-stacked nanowire FETs with gate-all-around structures and typical diameter of 20-nm. These devices, which we hav ...

Several technologies with sub-lithographic features are targeting the fabrication of crossbar memories in which the nanowire decoder is playing a major role. In this paper, we suggest a way to reduce the decoder size and keep it defect tolerant by using mu ...

This paper deals with the effects of faults on circuits implemented with controllable-polarity transistors. We propose a new fault model that suits the characteristics of these devices, and report the results of a SPICE-based analysis of the effects of fau ...

In silico modeling of Gene Regulatory Networks (GRN) has recently aroused a lot of interest in the biological community for modeling and understanding complex pathways. Boolean Networks (BN) are a common modeling tool for in silico dynamic analysis of such ...

A Majority-Inverter Graph (MIG) is a directed acyclic graph in which every vertex represents a three-input majority operation and edges may be complemented to indicate operand inversion. MIGs have algebraic and Boolean properties that enable efficie ...

Lithium is the main drug for the treatment of mood disorders. Due to its narrow therapeutic window, Therapeutic Drug Monitoring (TDM) is a norm during therapy in order to avoid adverse effects. Consequently, patients are obliged to frequent check-ups in ho ...

As an answer to the new electronics market demands, semiconductor industry is looking for different materials, new process technologies and alternative design solutions that can support Silicon replacement in the VLSI domain. The recent introduction of gra ...

This work reports on a heterogeneous integration of resistive memories into the Back-End-of-the-Line of 180nm standard CMOS foundry chips. A TaOx-based ReRAM technology with materials and processes fully CMOS compatible has been developed and characterized ...

Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (NoCs) are necessary to efficiently handle the 3D interconnect complexity. Desi ...

This paper presents a novel resynthesis engine for minimizing the dynamic power of digital circuits. Traditional logic synthesis methods primarily focus on zero-delay toggles—logic state changes occurring between the start and end of a clock cycle. In cont ...

Network-on-Chip (NoC) has emerged as a very promising paradigm for designing scalable communication architecture for Systems on Chips (SoCs). However, NoCs designed to fulfill the bandwidth requirements between the cores of an SoC for a certain set of runn ...

Giovanni De Micheli

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Multi-Processor Operating System Emulation Framework with Thermal Feedback for Systems-on-Chip

Temperature sensor placement in thermal management systems for MPSoCs

Silicon Nanowire Arrays and Crossbars: Top-Down Fabrication Techniques and Circuit Applications

Joint Hardware-Software Leakage Minimization Approach for the Register File of VLIW Embedded Architectures

Full Fabrication and Packaging of an Implantable Multi-panel Device for Monitoring of Metabolites in Small Animals

The Complexity of Self-Dual Monotone 7-Input Functions

The Emerging Majority: Technology and Design for Superconducting Electronics

Preserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies

Advances in Quantum Computation and Quantum Technologies: A Design Automation Perspective

Nanowire systems: technology and design (invited paper)

Fault-Tolerant Multi-Level Logic Decoder for Nanoscale Crossbar Memory Arrays

A Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors

Implicit Methods for Probabilistic Modeling of Gene Reglatory Networks

LUT Mapping and Optimization for Majority-Inverter Graphs

A novel electrochemical sensor for non-invasive monitoring of lithium levels in mood disorders

Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization

Heterogeneous Integration of ReRAM Crossbars in 180nm CMOS BEoL Process

Synthesis of Networks on Chips for 3D Systems on Chips

Lazy Man’s Resynthesis For Glitching-Aware Power Minimization

A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication