Kirsten Emilie Moselund

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In this work, we provide important parameters to take into account when fabricating in-plane III-V photodetectors (PDs) integrated on silicon (Si) using template-assisted selective epitaxy (TASE). Their performance has previously been demonstrated, and her ...

Coupled nanolasers are of growing interest for on-chip optical computation and data transmission, which requires an understanding of how lasers interact to form complex systems. The non-Hermitian interaction between two coupled resonators, when excited sel ...

Strain engineering is used to maintain Moore's Law in scaled CMOS devices and as a technology booster for More-than-Moore devices in the nanoelectronics era. Strain is crucial because of its ability to increase electron and hole mobilities in Si. However, ...

InGaAs/GaAsSb tunnelling field-effect transistors and InGaAs metal-oxide-semiconductor field-effect transistors can be integrated on the same silicon substrate using conventional CMOS-compatible processes, creating a platform for potential use in low-power ...

We report fast modulation (>30 GHz) in a SOI resonant cavity using integrated Bragg mirrors and a gate-all-around transistor as active element. Modulation depth >90% can be obtained in 12.5 μm long devices. ...

In this paper, a quantitative study of the corner effect and of the local volume inversion on gate-all-around MOSFETs based on numerical simulations has been carried out; different angles and doping levels are compared, in order to understand the impact of ...

In this letter, an abrupt NMOS inverter based on punch-through impact ionization is demonstrated for the first time. The slopes for both the rising and the falling edge of the ID(V GS) device characteristics are less than 10 mV/dec ...

This work reports for the first time on a cascadable NMOS inverter based on punch-through impact ionization MOSFET (PIMOS) integrated on a single body-tied silicon wire. The PIMOS device acts as a single-transistor-latch and shows abrupt current switching ...

This paper discusses three categories of small slope electronic switches: the Tunnel FET the IMOS and the NEM-FET which are expected to bring added value compared to CMOS by presenting an abrupt subthreshold slope, smaller than the physical limit, 60mV/decade, of the solid-state MOS transistor at room temperature. Recent results and future promises are reported.

Topological nature in different areas of physics and electronics has often been characterized and controlled through topological invariants depending on the global properties of the material. The validity of bulk-edge correspondence and symmetry-related to ...

Multiplexed local charge storage, close to quantum processors at cryogenic temperatures could generate a multitude of control signals, for electronics or qubits, in an efficient manner. Such cryogenic electronics require generating quasi-static control sig ...

In this work we present an in-memory computing platform based on coupled VO2 oscillators fabricated in a crossbar configuration on silicon. Compared to existing platforms, the crossbar configuration promises significant improvements in terms of area densit ...

The recently proposed PIMOS transistor can offer, by appropriate operation, non-hysteretic abrupt off-on transitions due to impact ionization if the action of its parasitic bipolar transistor is minimized. This work proposes non-hysteretic abrupt inverter ...

In this letter, the occupancy and tunneling probabilities of interband tunneling devices are studied, pointing out the fundamental function of the source Fermi-Dirac distribution. Particularly, the reason for the degraded subthreshold swing, which is typic ...

We report for the first time the optimization of the channel lateral strain profile as a new technological booster for improved performance of multi-gate n-channel MOSFET. We find that quasi-uniform or flat-Gaussian-close-to-the-drain profiles are optimum for the Ion boosting of sub-50nm scaled MOSFETs, while the penalty on Ioff and subthreshold slope is minimum. The reported predictions use realistic lateral uniaxial strain profiles, with peaks up to few GPa's and average values of hundreds of MPa's. ©2009

Photonic integrated circuits are paving the way for novel on-chip functionalities with diverse applications in communication, computing, and beyond. The integration of on-chip light sources, especially single-mode lasers, is crucial for advancing those pho ...

In this paper we investigate the mobility enhancement due to strain in bended NW MOSFETs. Stress of 200MPa to 2GPa, induced by thermal oxidation, is measured in suspended NW FETs by Raman spectroscopy. Mobility enhancement of more than 100% is observed. Performance gain of bended compared to non-bended structures is most pronounced in low field conditions and at low temperatures.

In the present work a punch-through impact ionization MOSFET (PIMOS) is presented, which exploits impact ionization in low-doped body-tied [Omega]- and tri-gate structures to obtain abrupt switching (3-10 mV/decade) combined with a hysteresis in the ID(VDS ...

Kirsten Emilie Moselund

Chattez avec Graph Search

Simulation and Fabrication of Monolithic III-V Photodetectors on Si: The Role of Growth Facets and Localization of Heterojunctions

Controlling lasing around exceptional points in coupled nanolasers

Nanoscale strain characterisation for ultimate CMOS and beyond

A hybrid III-V tunnel FET and MOSFET technology platform integrated on silicon

Fast and Efficient Light Intensity Modulation in SOI with Gate-All-Around Transistor Phase Modulator

Corner Effect and Local Volume Inversion in SiNW FETs

Abrupt NMOS Inverter Based on Punch-Through Impact Ionization With Hysteresis in the Voltage Transfer Characteristics

Hysteretic inverter-on-a-body-tied-wire based on less-than-10mV/decade abrupt punch-through impact ionization MOS (PIMOS) switch

Small slope micro/nano-electronic switches

Phase of Topological Lattice with Leaky Guided Mode Resonance

Cryogenic quantum computer control signal generation using high-electron-mobility transistors

Coupled VO2 oscillators circuit as analog first layer filter in convolutional neural networks

Non-hysteretic punchthrough impact ionization MOS (PIMOS) transistor: Application to abrupt inverter and NDR circuits

Tunneling and Occupancy Probabilities: How Do They Affect Tunnel-FET Behavior?

Optimization of the channel lateral strain profile for improved performance of multi-gate MOSFETs

Co-integration of gate-all-around MOSFETs and local silicon-on insulator optical waveguides on bulk silicon for GHz on-chip optical signaling

Coulomb blockade in gate-all-around silicon nanowire MOSFETs

Single-Mode Laser in the Telecom Range by Deterministic Amplification of the Topological Interface Mode

Bended gate-all-around nanowire MOSFET: a device with enhanced carrier mobility due to oxidation-induced tensile stress

Punch-through impact ionization MOSFET (PIMOS): From device principle to applications