Nanowire for Room Temperature Operated Hybrid CMOS-‘NANO’ Integrated Circuits

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Requirements for the miniaturization of electronics are constantly increasing as more and more functions are aimed to be integrated into a single device. At the same time, there are strong demands for low-cost manufacturing, environmental compatibility, ra ...

Today, we are witnessing the Internet of Things (IoT) revolution, which facilitates and improves our lives in many aspects, but comes with several challenges related to the technology deployment at large scales. Handling ever growing amounts of information ...

Dielectric breakdown etching is a well-known method of making nanopores on thin (similar to 50 nm) dielectric membranes. However, voltage driven translocation of biomolecules through such nanopores becomes extremely fast. For improved detection, for instan ...

Like integrated electronics, integrated photonics such as Silicon Photonics benefit from increased device-density on a single chip. Silicon is an excellent material for integrated photonics because its high refractive index allows devices to be made small, ...

We present the world's first backside-illuminated (BSI) single-photon avalanche diode (SPAD) based on standard silicon-on-insulator (SOI) complementary metal-oxide semiconductor (CMOS) technology. This SPAD achieves a good dark count rate (DCR) after backs ...

We present the design and performance of a broad-band single-chip integrated transceiver specifically conceived for nuclear magnetic resonance magnetometry. The single-chip transceiver is realized using a standard silicon complementary metal-oxide-semicond ...

A new method for safe electrical neural stimulation is proposed. A negative feedback is used to automatically produce short anodic pulses according to the remaining voltage. The period of the short anodic pulses varies according to the remaining voltage. T ...

Clocking power, including both clock distribution and registers, has long been one of the primary factors in the total power consumption of many digital systems. One straightforward approach to reduce this power consumption is to apply dual-edge-triggered ...

An universal remote powering and communication system is presented for the implantable medical devices. The system be interfaced with different sensors or actuators. A mobile external unit controls the operation of the implantable chip and reads the sensor ...

The paper presents a new initialization mechanism based on a Convex Combination Method (CCM) for Kohonen self-organizing Neural Networks (NNs) realized in the CMOS technology. A proper selection of initial values of the neuron weights exhibits a strong imp ...

In the past decades different methods based on magnetic resonance imaging (MRI) and positron emission tomography (PET) have been developed to image a variety of hemodynamic parameters in tissue. However, simultaneous high resolution imaging of oxy- and deo ...

This work demonstrates the first fabricated 4-transistor logic gates using polarity-configurable, gate-all- around silicon nanowire transistors. This technology enhances conventional CMOS functionality by adding the degree of free- dom of dynamic polarity ...

This letter presents a CMOS-compatible photodetector displaying direct light-to-time conversion and intrinsic charge integration with a very low dark current. This device is particularly adapted for applications requiring high sensitivity such as biolumine ...

We present a novel integrated circuit for a biosensing data acquisition chain. The circuit controls and reads out five bimolecular sensors as well as pH and temperature sensors for biosensor calibration. The IC supports both chronoamperometry (CA) a ...

With the rapid development of the applications in short range communication, phased-array receiver working at 24 GHz can provide enhanced gain performance at desired transmission direction. Also there is the wide signal bandwidth, i.e. 250 MHz free license ...

Three-dimensional (3-D) integration is a promising solution to further enhance the density and performance of modern integrated circuits (ICs). In 3-D ICs, multiple dies (tiers or planes) are vertically stacked. These dies can be designed and fabricated se ...

We present a monolithic silicon chip comprising a matrix of 84 single photon avalanche diodes (SPADs) to detect and discriminate fluorescent beads or fluorescently labeled single cells in a polydimethyl(-siloxane) (PDMS) cartridge that is positioned on top ...

Real-time and multi-target detection by wireless implantable devices is of increasing interest for chronic patients. In this work, electrode sharing is proposed to minimize the size of the implantable device when several three-electrode-based sensing sites ...

An efficient transistor level implementation of a flexible, programmable Triangular Function (TF) that can be used as a Triangular Neighborhood Function (TNF) in ultra-low power, self-organizing maps (SOMs) realized as Application-Specific Integrated Circu ...

A sixth-order low-pass

g_m

-C filter with a very wide tuning range (

f_c

= 100 Hz to 10 MHz) is presented. The wide tuning range has been achieved without using switchable components or programmable building blocks. A single stage folded-cascode transcon ...

Nanowire for Room Temperature Operated Hybrid CMOS-‘NANO’ Integrated Circuits

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Printed Electronics Technologies for Additive Manufacturing of Hybrid Electronic Sensor Systems

Energy Efficient Sensing using Steep Slope Devices

Optimized electrochemical breakdown etching using temporal voltage variation for formation of nanopores in a silicon membrane

Integration of MEMS in Silicon Photonics

First Near-Ultraviolet- and Blue-Enhanced Backside-Illuminated Single-Photon Avalanche Diode Based on Standard SOI CMOS Technology

A single-chip integrated transceiver for high field NMR magnetometry

An Active Charge Balancing Method Based on Chopped Anodic Phase

Automated Integration of Dual-Edge Clocking for Low-Power Operation in Nanometer Nodes

A Remotely Powered Implantable Biomedical System With Location Detector

An efficient initialization mechanism of neurons for Winner Takes All Neural Network implemented in the CMOS technology

Near-Infrared Optical Tomography with Single-Photon Avalanche Diode Image Sensors

Configurable Logic Gates Using Polarity Controlled Silicon Nanowire Gate-All-Around FETs

MOS-PN Hybrid Device With Minimum Dark Current for Sensitive Digital Photodetection

A Configurable IC to Control, Readout and Calibrate an Array of Biosensors

24 GHz LNA and Vector Modulator Phase Shifter for Phased-Array Receiver in CMOS Technology

Modeling and Design Techniques for 3-D ICs under Process, Voltage, and Temperature Variations

Fluorescent magnetic bead and cell differentiation/counting using a CMOS SPAD matrix

A Current-Mode Potentiostat for Multi-Target Detection Tested with Different Lactate Biosensors

A programmable triangular neighborhood function for a Kohonen self-organizing map implemented on chip

Low-Power and Widely-Tunable Linearized Biquadratic Low-Pass Transconductor-C Filter