Introduction to the FPL 2025 Journal Track

This editorial introduces the articles in the FPL 2025 Journal Track. The articles address difficult problems across the FPGA computing stack, including CAD-flow debugging and design-space exploration, programmable-logic capacity and utilization, and scalable homomorphically encrypted matrix multiplication. Although the contributions operate at different abstraction levels, each pairs its central idea with the models, tools, architectural mechanisms, or algorithms needed to evaluate it. Together, they illustrate how coordinated advances across these levels can improve FPGA design productivity, hardware efficiency, and application performance.