Giovanni De MicheliExpertise
Technologies de conception pour les systèmes intégrés, tels que la synthèse, le codesign de HW/SW et la conception de basse puissance. Technologies de conception des systèmes sur les plateformes hétérogènes comprenant les composants électriques, et biologiques.
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Enseignement et PhD A dirigé les thèses EPFL de Abhishek Garg, Mohamed Haykel Ben Jamaa, Francesco Zanini, Ciprian Seiculescu, Cristina Boero, Hu Xu, Andrea Cavallini, Shashi Kanth Ayatallah Ahmed Gamal Kamal ElakhrasExpertise
Dataflow ArchitectureHigh-Level Synthesis
Ayatallah is a Ph.D. student in the Processor Architecture Laboratory, advised by Professor Paolo Ienne. Between October 2023 and March 2024, she did an internship at AMD in the Research and Advanced Development team, under the supervision of Dr. Kristof Denolf. She received a B.Sc. degree in Computer Engineering from the American University in Cairo, Egypt in 2020 and started her Ph.D. in the same year.Her research interests include dataflow architecture,
Pasquale Davide SchiavoneEnseignement et PhD Cours Design technologies for integrated systems CS-472 La synthèse hardware est le processus de transformation - itérativement raffiné, détaillé et optimisé - d'une représentation faite en langage de description matérielle en un circuit. Ce cours présente les algorithmes, outils et méthodes de la compilation matérielle et de la synthèse logique.
Alexandre SchmidEnseignement et PhD A dirigé les thèses EPFL de Mahsa Shoaran, Wen-Yang Hsu, Reza Ranjandish, Keyvan Farhang Razi, Mohammad Javad Karimi A co-dirigé les thèses EPFL de Milos Stanisavljevic, Neil Joye, Vahid Majidzadeh Bafar, Hossein Afshari, Nikola Katic, Abdulkadir Akin Cours Analog circuits for biochip EE-518 Introduction à la conception analogique CMOS pour des biocapteurs à distance sur puce. Compréhension et la conception de systèmes de biocapteurs actifs et alimentés à distance. Compré
Babak FalsafiEnseignement et PhD Doctorant·es actuel·les Yuanlong Li, Simla Burcu Harma, Shashwat Shrivastava, Alexandros Poupakis, Shanqing Lin, Ayan Chakraborty, Pooria Poorsarvi Tehrani, Ali Ansari A dirigé les thèses EPFL de Pejman Lotfi Kamran, Sotiria Fytraki, Dejan Novakovic, Stavros Volos, Djordje Jevdjic, Ilknur Cansu Kaynak, Yusuf Onur Koçberber, Javier Picorel Obando, Alexandros Daglis, Mario Paulo Drumond Lages De Oliveira, Arash Pourhabibi Zarandi, Mark Johnathon Sutherland, Siddharth Gupta, Ognjen Glamoc
Arman MaghsoudniaEducation Electrical Engineering | 2018 – 2023 Sharif University of Technology
Teaching & PhDCOM-405 | Mobile networks This course provides a detailed description of the organization and operating principles of mobile and wireless communication networks, as well as the use of wireless signals for sensing and imaging.COM-304 | Intelligent systems: communications & AI The course teaches the development of systems that solve real-world challenges in communications, signal processing, foundati
Barbara JobstmannExpertise
Automatic synthesis and repair of reactive programsQuantitative analysis and synthesisFormal verification and modelling of systems (e.g., hardware designs, transactional memories, biological systems, business processes,...)
About me
I am a lecturer for the school of computer and communication sciences and I organise different outreach activities (for more details visit our IC Declic Summer School Webpage). In addition, I work for Cadence Design Systems.My research focused on the development of rel
Roger HerschRoger D. Hersch is professor of Computer Science and head of the Peripheral Systems Laboratory at EPFL. He received his engineering degree from ETHZ in 1975, worked in industry from 1975 to 1980, and obtained his PhD degree from EPFL in 1985. He directed the widely known
Visible Human Web Server project
, which offers a number of services for the visualization of human anatomy.
His current research focuses on color reproduction, spectral color prediction models, moiré imaging, and visual document security. Recent achievements include the PhotoProtect technology, which incorporates text as chromatic differences in order to protect identity photographs (Swiss driving license), microstructure imaging, which is used by railways companies (SNCF, RENFE) and festival organizers (Paleo) to print tickets at home and the band moire imaging technology for the protection of security documents.
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
Marco MattavelliEnseignement et PhD A dirigé les thèses EPFL de Christophe Clerc, Ruohua Zhou, Beilu Shao, Christophe Lucarz, Richard Thavot, Ab Al Hadi Bin Ab Rahman, Endri Bezati, Simone Casale Brunet, Malgorzata Michalska, Ana Angelica Hernandez Lopez, Aurélien Bloch, Mustafa Besirli, Ünsal Öztürk A co-dirigé les thèses EPFL de Sylvain Aguirre Cours Systems and architectures for signal processing EE-555 Etude des composants essentiels eessentiels et des technologies des systèmes de traitements des signau
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