Publication

Introduction to the FPL 2025 Journal Track

2026

Abstract

This editorial introduces the articles in the FPL 2025 Journal Track. The articles address difficult problems across the FPGA computing stack, including CAD-flow debugging and design-space exploration, programmable-logic capacity and utilization, and scalable homomorphically encrypted matrix multiplication. Although the contributions operate at different abstraction levels, each pairs its central idea with the models, tools, architectural mechanisms, or algorithms needed to evaluate it. Together, they illustrate how coordinated advances across these levels can improve FPGA design productivity, hardware efficiency, and application performance.

Official source

https://infoscience.epfl.ch/entities/publication/18e72345-56ac-4b9b-9d1e-8e20580e04a2

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2026

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/18e72345-56ac-4b9b-9d1e-8e20580e04a2

About this result

Related concepts (31)

Hardware description language

In computer engineering, a hardware description language (HDL) is a specialized computer language used to describe the structure and behavior of electronic circuits, and most commonly, digital logic circuits. A hardware description language enables a precise, formal description of an electronic circuit that allows for the automated analysis and simulation of an electronic circuit.

Computer performance

In computing, computer performance is the amount of useful work accomplished by a computer system. Outside of specific contexts, computer performance is estimated in terms of accuracy, efficiency and speed of executing computer program instructions. When it comes to high computer performance, one or more of the following factors might be involved: Short response time for a given piece of work. High throughput (rate of processing work). Low utilization of computing resource(s). Fast (or highly compact) data compression and decompression.

Field-programmable gate array

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured after manufacturing. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools. FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable interconnects allowing blocks to be wired together.

Related publications (9)

Introduction to the FPL 2025 Journal Track

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