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Farzan Jazaeri

Cette personne a quitté l’EPFL

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Publications associées (81)

Page 2 sur 5

GigaRad total ionizing dose and post-irradiation effects on 28 nm bulk MOSFETs

Christian Enz, Claudio Bruschini, Farzan Jazaeri, Chunmin Zhang, Alessandro Pezzotta

The DC performance of both n- and pMOSFETs fabricated in a commercial-grade 28 nm bulk CMOS process has been studied up to 1 Grad of total ionizing dose and at post-irradiation annealing. The aim is to assess the potential use of such an advanced CMOS tech ...

IEEE2016

Modeling the Effects of Interface Traps on DC Characteristics in GaN High-Electron-Mobility Transistors

Farzan Jazaeri

This paper presents a physics-based analytical model for investigating charge trapping in GaN high-electron-mobility transistors (HEMTs), using the École Polytechnique Fédérale de Lausanne HEMT core model. It introduces a realistic continuous density of in ...

2025

Heavily Doped Junctionless Vertical Slit FETs with Slit Width Below 20 nm

Jean-Michel Sallese, Farzan Jazaeri, Didier Bouvet, Lucian Barbut

This paper reports an alternative simple fabrication process for twin gate junctionless Vertical Slit Field Effect Transistors. N-type devices have been successfully manufactured on SOI substrates with a doping density 5×1018 atoms/cm3. The devices demonst ...

2013

Design Considerations of Ferroelectric Properties for Negative Capacitance MOSFETs

Mihai Adrian Ionescu, Christian Enz, Farzan Jazaeri, Ali Saeidi

Impact of physical parameters of ferroelectric layer on the performance of Negative Capacitance (NC) MOSFETs is experimentally studied in this paper. Electrical behaviors of PZT-based and Si:HfO2-based NC-FETs are investigated and discussed. In a PZT-based ...

2018

Low-power and high-performance Automatic Gain Control systems based on nanoscale Field Effect Diode and SOI-MOSFET

Farzan Jazaeri

The Automatic Gain Control (AGC) systems based on nanoscale Field Effect Diode (FED) and double gate silicon on insulator (SOI) MOSFET are investigated in this paper. Using double gate devices leads to more flexibility in gain controlling, improving perfor ...

2010

A Review on Quantum Computing: From Qubits to Front-end Electronics and Cryogenic MOSFET Physics

Jean-Michel Sallese, Arnout Lodewijk M Beckers, Farzan Jazaeri, Seyed Armin Tajalli

Quantum computing (QC) has already entered the industrial landscape and several multinational corporations have initiated their own research efforts. So far, many of these efforts have been focusing on superconducting qubits, whose industrial progress is c ...

IEEE2019

Cryogenic RF Characterization and Simple Modeling of a 22 nm FDSOI Technology

Edoardo Charbon, Christian Enz, Farzan Jazaeri, Hung-Chi Han, Antonio D'Amico

This paper presents the RF characterization and modeling of a 22nm FDSOI technology down to 3.3K for quantum computing applications. The equivalent small-signal components are extracted analytically and automatically from the de-embedded two-port Y -parame ...

IEEE2022

In-depth Cryogenic Characterization of 22 nm FDSOI Technology for Quantum Computation

Edoardo Charbon, Christian Enz, Farzan Jazaeri, Hung-Chi Han, Antonio D'Amico

In this paper, the influence of temperature and back-gate bias is experimentally investigated on 22 nm FDSOI CMOS process. Cryogenic DC characterization was carried out under various back-gate voltages, V back , from 2.95 K back to 300 K. An abrupt drop-of ...

IEEE2021

Modeling Junctionless Metal-Oxide-Semiconductor Field-Effect Transistor

Farzan Jazaeri

Metal-oxide semiconductor (MOS) field-effect transistor (FET) scaling is following the prediction of the Moore's law for the past 45 years, a key factor that enabled the IC industry to cope with the everlasting demand for higher performances. However, this ...

EPFL2015

Characterization and Modeling of 28 nm Bulk CMOS Technology down to Cryogenic Temperatures (4.2 K)

Christian Enz, Arnout Lodewijk M Beckers, Farzan Jazaeri

This paper presents an experimental investigation, compact modeling, and low-temperature physics-based modeling of a commercial 28-nm bulk CMOS technology operating at cryogenic temperatures. The physical and technological parameters are extracted at 300, ...

2018

Negative Capacitance as Universal Digital and Analog Performance Booster for Complementary MOS Transistors

Mihai Adrian Ionescu, Christian Enz, Farzan Jazaeri, Igor Stolichnov, Ali Saeidi

Boltzmann electron energy distribution poses a fundamental limit to lowering the energy dissipation of conventional MOS devices, a minimum increase of the gate voltage, i.e. 60 mV, is required for a 10-fold increase in drain-to-source current at 300 K. Neg ...

Nature Research2019

Non Quasi-Static Model of DG Junctionless FETs

Jean-Michel Sallese, Farzan Jazaeri

In this paper an analytical non-quasi-static (NQS) model for long-channel symmetric double-gate junctionless field-effect transistors (JLFETs) operating in depletion mode is proposed for the first time. The model addresses the limitations of existing DC an ...

2024

A Common Core Model for Junctionless Nanowires and Symmetric Double Gate FETs

Jean-Michel Sallese, Farzan Jazaeri, Lucian Barbut

In this brief, we evidence the link between planar and cylindrical junctionless FETs from the electrostatics point of view. In particular, we show that an approximate solution of the Poisson-Boltzmann equation for junctionless nanowires can be mapped on th ...

Institute of Electrical and Electronics Engineers2013

Transcapacitances Modeling in ultra-thin gate-all-around junctionless nanowire FETs, including 2D quantum confinement

Farzan Jazaeri

In this work, we propose an analytical model for the intrinsic transcapacitances in ultra-thin gate-all-around junctionless nanowire field effect transistors in the presence of confined energy states of electrons. The validity of the developed model is con ...

PERGAMON-ELSEVIER SCIENCE LTD2023

Nonhysteretic Condition in Negative Capacitance Junctionless FETs

Jean-Michel Sallese, Farzan Jazaeri, Amin Rassekh

This article analyzes the design space stability of negative capacitance double-gate junctionless field-effect transistors (NCDG JLFETs). Using analytical expressions derived from a charge-based model, we predict instability condition, hysteresis voltage, ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2022

Modeling Channel Thermal Noise and Induced Gate Noise in Junctionless FETs

Jean-Michel Sallese, Farzan Jazaeri

This paper presents analytical expressions for channel noise, induced gate noise (IGN), and cross-correlation noise in a long-channel junctionless (JL) double-gate MOSFET. The analytical relationships, which have been derived from a coherent charge-based m ...

Ieee-Inst Electrical Electronics Engineers Inc2015

A Design-oriented Charge-based Simplified Model for FDSOI MOSFETs

Christian Enz, Farzan Jazaeri, Alessandro Pezzotta

In this paper a design-oriented model for asymmetrical double-gate (ADG) MOSFETs is proposed. Including the back-gate effect into the original simplified EKV bulk model requires only one additional parameter to the existing four, and extends the simplified ...

2018

Characterization of GigaRad Total Ionizing Dose and Annealing Effects on 28-nm Bulk MOSFETs

Christian Enz, Claudio Bruschini, Farzan Jazaeri, Chunmin Zhang, Alessandro Pezzotta

This paper investigates the radiation tolerance of 28-nm bulk n and pMOSFETs up to 1 Grad of total ionizing dose (TID). The radiation effects on this commercial 28-nm bulk CMOS process demonstrate a strong geometry dependence as a result of the complex int ...

2017

Carrier Mobility Extraction Methodology in Junctionless and Inversion-Mode FETs

Jean-Michel Sallese, Farzan Jazaeri

In this paper, we propose a new method to extract the free carrier mobility in junctionless (JL) double-gate FETs biased in accumulation. We show that, in addition to assuming a well-defined field-dependent mobility law, using the well-known Y-function is ...

Institute of Electrical and Electronics Engineers2015

An Experimental Study on Mixed-Dimensional 1D-2D van der Waals Single-Walled Carbon Nanotube-WSe2 Hetero-Junction

Mihai Adrian Ionescu, Farzan Jazaeri, Ali Saeidi, Matteo Cavalieri, Nicolò Oliva, Sadegh Kamaei Bahmaei, Benjamin Paul Johanès Gabriel Lambert, Amin Rassekh

This experimental study investigates a novel multi-functional one dimensional-two dimensional (1D-2D) heterojunction made of two different band-gap semiconductors, i.e. single-walled carbon nanotube (SWCNT) and tungsten di-selenide (WSe2). The proposed ult ...

Institute of Electrical and Electronics Engineers2020