Publications de Katrin Sidler Arnet

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This thesis presents the fabrication and characterization of organic thin film transistors (TFTs) on flexible polymer substrates and the development of compliant stencil lithography to significantly improve the patterning resolution on full-wafer scale. Po ...

Stencil lithography is used here for the fabrication of bismuth nanowires using thermal evaporation. This technique provides good electrical contact resistance by having the nanowire structure and the contact pads deposited at the same time. It has also th ...

A quantitative analysis of the blurring and its dependence on the stencil-substrate gap and the deposition parameters in stencil lithography, a high resolution shadow mask technique, is presented. The blurring is manifested in two ways: first, the structur ...

We report on the patterning and characterization of titanium–gold (Ti–Au) wire test structures on polyethylene naphthalate (PEN), polyethylene terephthalate (PET) and polyimide (PI) substrates. PEN, PET and PI are flexible polymers which can withstand stre ...

A moire is an interference pattern that appears when two different periodic structures are overlaid. The image created is extremely sensitive to small variations in the original layers and is thus very interesting for anti-counterfeit protection. We presen ...

We present the fabrication process and electrical characterization of sub-100 nm scale Al nanowires (NWs) fabricated by stencil lithography (SL). We use a stencil with sub- 100 nm wide nanoslits patterned by focused ion beam (FIB) milling. The stencil is a ...

Stencil lithography (SL) is a shadow mask based technique which allows parallel, resistless, micro- and nano-patterning of material through apertures in a membrane (stencil) onto a substrate [1]. The stencils are usually made of LPCVD low-stress SiN due to ...

This paper presents new results on miniaturized organic thin film transistors (TFT) fabricated on a spin coated polyimide (PI) film. Patterning steps, that are vital for the integrity and electrical performances of the organic TFT, were performed using res ...

This work reports on a considerable resolution improvement of micro/nanostencil lithography when applied on full-wafer scale by using compliant membranes to reduce gap-induced pattern blurring. Silicon nitride (SiN) membranes are mechanically decoupled fro ...

The reliable and reproducible fabrication of nanostructures by stencil lithography faces three main challenges: the stability of the thin stencil membranes with nanoapertures, the blurring of the deposited structures, and the clogging of the nanoapertures ...

In this work a double-gate pentacene TFT architecture is presented. The devices are fabricated on a polyimide substrate using three aligned levels of stencil lithography along with standard photolithography, which enable a soft yet well controlled device p ...

Two levels of aligned stencil lithography were used to fabricate pentacene thin film transistors on 12 mu m thick flexible polyimide substrates. Flexible transistors with 20 x 40 mu m(2) channels were electrically measured under strain up to 2.6%. After on ...

With the use of the stencil lithography, we fabricated pentacene thin-ﬁlm transistors pre- pared directly on thermally oxidized silicon gates with channel lengths ranging from 2 to 600 lm. By performing 4-probe measurements or by using the transfer line me ...

In order to keep up with the advances in nano-fabrication, alternative, cost-efficient lithography techniques need to be implemented. Two of the most promising are nanoimprint lithography (NIL) and stencil lithography. We explore here the possibility of fa ...

In this paper we report on the effect of the environment on the SiO₂/pentacene interface. Two batches of bottom-contact pentacene thin-film transistors have been fabricated with a 100 nm thick SiO₂ as dielectric. Considerable shifts of the threshold voltag ...

Resistless processes to realize the pattern transfer of your designs into the substrate present some advantages, as the reduction in fabrication steps. Stencil Lithography (SL) is one of the most used resistless processes and, up to now, it has mainly been ...

Stencil lithography (SL) is a shadow mask technique which allows parallel, resistless, micro- and nano- patterning of material through apertures created in a membrane (stencil) onto a substrate. The stencils are usually made of LPCVD low-stress SiN due to ...

The standard lithographic techniques to fabricate electronic components involve the use of polymers, baking steps and chemicals. This typically restricts their application to flat substrates made up of standard materials. Stencil lithography has been propo ...

Katrin Sidler Arnet

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Organic Pentacene Thin Film Transistors on Flexible Substrates Fabricated by Stencil Lithography

Stenciled conducting bismuth nanowires

Analysis of the blurring in stencil lithography

Resistivity Measurements of Gold Wires Fabricated by Stencil Lithography on Flexible Polymer Substrates

High-resolution 1D moirés as counterfeit security features

Sub-100 nm-scale Aluminum Nanowires by Stencil Lithography: Fabrication and Characterization

Robust PECVD SiC membrane made for stencil lithography

Organic Thin Film Transistors on Flexible Polyimide Substrates Fabricated by Full Wafer Stencil Lithography

Compliant membranes improve resolution in full-wafer micro/nanostencil lithography

Reliable and Improved Nanoscale Stencil Lithography by Membrane Stabilization, Blurring and Clogging Corrections

Double-Gate Pentacene TFTs with Improved Control in Subthreshold Region

Streched organic transistors maintain mobility on flexible substrates

The effects of channel length and film microstructure on the performance of pentacene transistors

Stencilled Conducting Bismuth Nanowires

Resistless Fabrication of Nanoimprint Lithography (NIL) Stamps Using Nano-Stencil Lithography

Pentacene - SiO2 interface: Role of the environment prior to pentacene deposition and its impact on TFT DC characteristics

Etching of sub-micrometer structures through Stencil

Organic Thin Film Transistors on Flexible Polyimide Substrates Fabricated by Full Wafer Stencil Lithography

Robust PECVD SiC membrane made for stencil lithography

All-stencil transistor fabrication on 3D silicon substrates