Publications de Igor Stolichnov

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Charge compensation at the interface is a fundamental phenomenon determining the operation conditions of thin-film devices incorporating ferroelectrics. The underlying mechanisms have been thoroughly addressed in perovskite ferroelectrics where the charge ...

We propose and experimentally demonstrate top-gated complementary n- and p-type black phosphorous field effect devices (FETs) by engineering the workfunction of pre-patterned electrodes embedded in a SiO2 bottom layer. Pre-patterned electrodes offer the ad ...

In this work, we report an experimental investigation of pulsed laser deposition (PLD) of thin Gd:HfO2 layers at 330 degrees C, which show ferroelectric behavior after annealing at 450 degrees C, compatible with complementary metal-oxide-semiconductor back ...

The paper discusses an experimental demonstration of Bloch oscillations connected with Bragg reflection of electrons from the first miniband edge in superlattices of different silicon carbide polytypes. The original experimental method was geared towards obtaining a strong uniform electric field meeting the conditions of Bloch oscillations. Direct measurements have allowed observation of the negative differential conduction associated with the Bloch oscillations for polytypes 4G, 6H and 8H, having superlatt

An attractive combination of properties of the ferroelectric copolymer of vinylidene fluoride and trifluoroethylene (P(VDF-TrFE)), including a relatively high spontaneous polarization and low dielectric constant as well as low processing temperature makes this material useful for studying the ferroelectric gate operation for 1T nonvolatile ferroelecetric memory applications. Here we explore a silicon-based ferroelectric field effect transistor with P(VDF-TrFE) gate showing a persistent switching of the drai

This work experimentally demonstrates that the negative capacitance effect can be used to significantly improve the key figures of merit of tunnel field effect transistor (FET) switches. In the proposed approach, a matching condition is fulfilled between a ...

In this work, we experimentally explore and compare FET gate stacks with and without an inner metal plane between a linear dielectric (SiO2) and a ferroelectric layer (Si-doped HfO2) operating in the negative capacitance (NC) regime. The use of nanosecond- ...

This work experimentally demonstrates negative capacitance MOSFETs in hysteretic and non-hysteretic modes of operation. A PZT capacitor is externally connected to the gate of commercial nMOSFETs fabricated in 28nm CMOS technology to explore the negative ca ...

This paper demonstrates and experimentally reports the highest ever performance boosting in strained silicon-nanowire homojunction TFETs with negative capacitance, provided by matched PZT capacitors. Outstanding enhancements of Ion, gm, and overdrive are analyzed and explained by most effective reduction of body factor, m < 1, especially for VG>VT, which greatly amplify the control on the surface potential TFET, which dictates a highly non-linear BTBT regime. We achieve a full non-hysteretic negative-capaci

A polymer based Ferroelectric gate FET at 1T non-volatile memory on bulk silicon is demonstrated. Spin-coated 40 nm and 100 nm P(VDF-TrFE) (70%-30%) ultra-thin films have been integrated onto 10 nm SiO₂ layer as gate dielectric into a conventional silicon ...

Conductive domain walls (DWs) in ferroic materials have emerged as promising candidates for applications in nanoelectronics due to their unique properties such as high conductivity and nonvolatility. In this study, we investigate the atomic structure and c ...

Recent studies on memristive materials and technologies have expanded beyond conventional memory elements, driven by their potential application in novel information processing concepts. Among these materials, conductive domain walls in ferroics are especi ...

Control of magnetic domain walls (DWs) and their propagation is among the most promising development directions for future information-storage devices. The well-established tools for such manipulation are the spin-torque transfer from electrical currents a ...

This paper presents a novel nanoscale platform based on vanadium dioxide (VO2) two-terminal devices shaped like nanowires (NWs). For the first time we report CMOS compatible VO2 two-terminal devices with little-to-no stochasticity in the absence of electro ...

We report the implementation of a ferroelectric gate field effect transistor (FeFET) with a ferromagnetic (Ga,Mn)As conducting channel. The Curie temperature T-C in the channel is modulated by non-volatile poling of the gate. The ferroelectric state, and t ...

The microstructure of ferroelectric Cd1−xZnxTe (CZT) thin films with x ≈ 0.04 grown by molecular beam epitaxy has been studied by means of cross sectional high-resolution transmission electron microscopy (HREM). High- density {1 1 1} lamellar twins are fou ...

Use of ferroelectric domain-walls in future electronics requires that they are stable, rewritable conducting channels. Here we demonstrate nontherrnally activated metallic-like conduction in nominally uncharged, bent, rewritable ferroelectric-ferroelastic ...

Igor Stolichnov

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Polarization screening in polymer ferroelectric films: Uncommon bulk mechanism

Polarity Control of Top Gated Black Phosphorous FETs by Workfunction Engineering of Pre-Patterned Au and Ag Embedded Electrodes

Experimental Investigation of Pulsed Laser Deposition of Ferroelectric Gd:HfO2 in a CMOS BEOL Compatible Process

Negative differential conduction in the Bloch oscillations regime in the hexagonal silicon carbide polytypes 4H, 6H and 8H

Ferroelectric Polymer Gate Transistor as a Model System for Exploring the Mechanisms of the Retention Loss

Effect of hysteretic and non-hysteretic negative capacitance on tunnel FETs DC performance

Negative Capacitance in HfO2 Gate Stack Structures With and Without Metal Interlayer

Negative Capacitance Field Effect Transistors; Capacitance Matching and non-Hysteretic Operation

Negative Capacitance Tunnel FETs: Experimental Demonstration of Outstanding Simultaneous Boosting of On-current, Transconductance, Overdrive, and Swing

Low voltage Ferroelectric FET with sub-100nm copolymer P(VDF-TrFE) gate dielectric for non-volatile 1T memory

Atomic-Scale Characterization of 180° Conductive Domain Walls in PbZr0.1Ti0.9O3

Graphene-enhanced ferroelectric domain wall high-output memristor

Negative capacitance tunnel F£Ts: Experimental demonstration of outstanding simultaneous boosting of on-current, transconductance, overdrive, and swing

Magnetic domain wall propagation under ferroelectric control

Erratum: Evidence for dielectric aging due to progressive 180° domain wall pinning in polydomain Pb(Zr0.45Ti0.55)O3 thin films [Phys. Rev. B 79, 054104 (2009)]

An Investigation of VO2 Nanowire Arrays for Integrated Sensing. From Non-Stochastic Nanowires to Stochastic Nanostructures

Control of Ferromagnetism in a (Ga,Mn)As - Based Multiferroic System via a Ferroelectric Gate

Ferroelectric control of ferromagnetism in diluted magnetic semiconductors

HREM studies of twins in Cd1−xZnxTe (x ≈ 0.04) thin films grown by molecular beam epitaxy

Bent Ferroelectric Domain Walls as Reconfigurable Metallic-Like Channels