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Alessandro Cevrero

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Related publications (31)

Please note that this is not a complete list of this person’s publications. It includes only semantically relevant works. For a full list, please refer to Infoscience.

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Related publications (31)

Please note that this is not a complete list of this person’s publications. It includes only semantically relevant works. For a full list, please refer to Infoscience.

Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver

Yusuf Leblebici, Alessandro Cevrero, Thomas Toifl, Lukas Kull, Ilter Ozkaya, Gain Kim, Cosimo Aprile

This paper presents a parallel implementation technique of digital equalizer for high-speed wireline serial link receiver (RX). In wireline RX, inter-symbol interference (ISI) is mitigated by continuous-time linear equalizer, and the remaining ISI is cance ...

2018

Design and Analysis of Jitter-Aware Low-Power and High-Speed TSV Links for 3D ICs

Giovanni De Micheli, Yusuf Leblebici, Alessandro Cevrero, Giulia Beanato, Kiarash Gharibdoust

This paper presents a circuit-level design and analysis of high-data-rate 3D serial vertical links which exploit the high bandwidth provided by TSV technology. As most of the existing TSVs consume a large amount of die area, the serial configuration can sa ...

Elsevier2016

Design and Testing Strategies for Modular 3-D-Multiprocessor Systems Using Die-Level Through Silicon Via Technology

Yusuf Leblebici, Alessandro Cevrero, Michail Zervas, Yüksel Temiz, Giulia Beanato, Panagiotis Athanasopoulos, Paolo Giovannini

An innovative modular 3-D stacked multi-processor architecture is presented. The platform is composed of completely identical stacked dies connected together by through-silicon-vias (TSVs). Each die features four 32-bit embedded processors and associated m ...

2012