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Jean-Michel Sallese

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Related publications (150)

Page 2 of 8

A Physics-Based Analytical Compact Model for the Drift Region of the HV-MOSFET

Jean-Michel Sallese, François Krummenacher, Antonios Bazigos, Matthias Bucher

This paper presents a novel physics-based analytical compact model for the drift region of a high-voltage metal-oxide-semiconductor field-effect transistor (HV-MOSFET). According to this model, the drift region is considered as a simple 1-D problem, just a ...

2011

Analytical Modeling of Double-Gate and Nanowire Junctionless ISFETs

Jean-Michel Sallese, Farzan Jazaeri, Ashkhen Yesayan

In this article, we present a theoretical analysis of a junctionless (JL), ion-sensitive, field-effect-transistor (ISFET), self-consistently combining the electrochemical interaction between the semiconductor-insulator interface and the surrounding electro ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2020

On performance scaling and speed of junctionless transistors

Jean-Michel Sallese, Adil Koukab

A prospective study of the junctionless transistors (JLTs) scaling performances based both on TCAD and analytical evaluations of the intrinsic delay after considering on/off voltage constraints is proposed. The tradeoffs between speed and switching power p ...

Pergamon-Elsevier Science Ltd2013

Noise Modeling Methodologies in the Presence of Mobility Degradation and their Equivalence

Christian Enz, Jean-Michel Sallese, Ananda Sankar Roy

Institute of Electrical and Electronics Engineers2006

Spice Simulation of Substrate Minority Carriers Propagation with Equivalent Electrical Circuit

Maher Kayal, Jean-Michel Sallese, Camillo Stefanucci, Pietro Buccella

This paper presents an equivalent electrical circuit for one dimensional substrate minority carriers spice simulation. The electrical circuit parameters are extracted from substrate meshing applying the finite difference method. This model is derived from ...

Ieee2014

Source–Drain Partitioning in MOSFET

Christian Enz, Jean-Michel Sallese, Ananda Sankar Roy

The Ward-Dutton (WD) partitioning scheme [IEEE Trans. Electron Devices, vol. ED-27, p. 1571, Aug. 1980] is used extensively to develop transient and high-frequency advanced compact models for MOSFET devices. Recently, it has been shown that WD partitioning ...

2007

Design space of quantum dot spin qubits

Jean-Michel Sallese, Farzan Jazaeri, Amin Rassekh

Solid-state qubits can be implemented with electrostatically confined quantum dots in semiconductors, allowing gate voltages to independently control the electrochemical potentials of each quantum dot. Quantum dots offer high levels of reliability and scal ...

ELSEVIER2023

Simulation, Analysis, and Verification of Substrate Currents for Layout Optimization of Smart Power ICs

Maher Kayal, Jean-Michel Sallese, Camillo Stefanucci, Pietro Buccella

Today circuit failures in Smart Power ICs due to substrate couplings are partially addressed during the circuit design phase. The state-of-the-art guidelines for the optimization of parasitic couplings provide mainly qualitative rules, which are difficult ...

Institute of Electrical and Electronics Engineers2016

Analog RF and mm-Wave Design Tradeoff in UTBB FDSOI: Application to a 35 GHz LNA

Jean-Michel Sallese, Wladyslaw Grabinski

The state-of-the art RF and millimeter-wave first-cut circuits design requires simple hand calculation methods to avoid time-consuming iterative simulations. The classical MOSFET sizing methods used in advanced technologies, still rely on questionable and ...

IEEE2018

System-Level Design Considerations for Carbon Nanotube Electromechanical Resonators

Maher Kayal, Jean-Michel Sallese, Marc Pastre, Christian Kauth

Despite an evermore complete plethora of complex domain-specific semiempirical models, no succinct recipe for large-scale carbon nanotube electromechanical systems design has been formulated. To combine the benefits of these highly sensitive miniaturized m ...

Hindawi Publishing Corporation2013

Modeling Minority Carriers Related Capacitive Effects for Transient Substrate Currents in Smart Power ICs

Maher Kayal, Jean-Michel Sallese, Camillo Stefanucci, Pietro Buccella

This paper presents an extended model for transient and ac circuit-level simulation of minority carriers propagation through the substrate of smart power integrated circuits (ICs). A p-n junction and a diffusion resistor with capacitive components are prop ...

Institute of Electrical and Electronics Engineers2015

Spice Simulation of Passive Protection in Smart Power ICs

Maher Kayal, Jean-Michel Sallese, Camillo Stefanucci, Pietro Buccella

When designing in Smart Power technologies, TCAD simulations are mandatory to design effective passive protections against parasitic couplings due to minority carriers. The objective of this paper is to propose a spice-based approach to characterize electr ...

Ieee2015

Submicrometer Organic Thin-Film Transistors: Technology Assessment Through Noise Margin Analysis of Inverters

Christian Enz, Jean-Michel Sallese, Rolando Ferrini, Frédéric Zanella, Nenad Marjanovic

In this paper, we propose a methodology to evaluate the potential of submicrometer organic thin-film transistors (OTFTs) with nanoimprinted gate and self-aligned source and drain contacts. In the first step, the dedicated static model we previously reporte ...

Institute of Electrical and Electronics Engineers2014

Electrical model of a single pixel SOI phototransistor relying on the transient charge pumping technique

Maher Kayal, Jean-Michel Sallese

In this paper a floating body partially depleted SOI MOSFET used to measure light intensity using the transient charge pumping [1] is modeled through an equivalent electrical circuit. Essentially, photogenerated charges of the MOSFET are converted into a c ...

2007

Heavily Doped Junctionless Vertical Slit FETs with Slit Width Below 20 nm

Jean-Michel Sallese, Farzan Jazaeri, Didier Bouvet, Lucian Barbut

This paper reports an alternative simple fabrication process for twin gate junctionless Vertical Slit Field Effect Transistors. N-type devices have been successfully manufactured on SOI substrates with a doping density 5×1018 atoms/cm3. The devices demonst ...

2013

Offset And Drift Analysis Of The Hall Effect Sensors. The Geometrical Parameters Influence

Maher Kayal, Jean-Michel Sallese, Maria-Alexandra Paun

Several Hall sensor configurations have been integrated in CMOS 0.35 mu m technology and analyzed in terms of offset at room temperature and offset drift. We searched for the best geometry that would minimize the offset and its corresponding drift. The tar ...

Inst Materials Physics2012

The Timepix4 analog front-end design: Lessons learnt on fundamental limits to noise and time resolution in highly segmented hybrid pixel detectors

Jean-Michel Sallese, Adil Koukab

This manuscript describes the optimization of the front-end readout electronics for high granularity hybrid pixel detectors. The theoretical study aims at minimizing the noise and jitter. The model presented here is validated with both circuit post layout ...

2023

Theoretical Studies of Nanowire Ion-Sensitive Field Effect Transistor

Jean-Michel Sallese, Ashkhen Yesayan

The operation principle of a semiconductor nanowire (NW) ion-sensitive field-effect transistor (ISFET), denoted for pH sensing, is studied within the framework of this work. The physical processes in the system are mathematically modelled and presented in ...

PLEIADES PUBLISHING INC2021

Characteristics and ultra-high total ionizing dose response of 22nm fully depleted silicon-on-insulator

Jean-Michel Sallese, Adil Koukab, Gennaro Termo

The radiation response of MOS transistors in a 22 nm Fully Depleted Silicon -On -Insulator (FDSOI) technology exposed to ultra -high total ionizing dose (TID) was investigated. Custom structures including n- and p -channel devices with different sizes and ...

Iop Publishing Ltd2024

Charge, Current, and Noise Partitioning in MOSFET in the Presence of Mobility Degradation

Christian Enz, Jean-Michel Sallese, Ananda Sankar Roy

The Ward-Dutton (WD) partitioning scheme is used extensively to develop transient and high-frequency advanced compact models in MOSFET analysis. However, it remains an open question if this scheme can be used for field-dependent mobility that is enhanced i ...

Institute of Electrical and Electronics Engineers2006