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Didier Bouvet

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Related publications (57)

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Capacitive nanoelectromechanical switch based on suspended carbon nanotube array

Mihai Adrian Ionescu, László Forró, Arnaud Magrez, Didier Bouvet, Rita Smajda, Donatello Acquaviva

We present the fabrication and high frequency characterization of a capacitive nanoelectromechanical system (NEMS) switch using a dense array of horizontally aligned single-wall carbon nanotubes (CNTs). The nanotubes are directly grown onto metal layers wi ...

American Institute of Physics2010

Coulomb blockade in gate-all-around silicon nanowire MOSFETs

Mihai Adrian Ionescu, Didier Bouvet, Kirsten Emilie Moselund, Vincent Pott

2006

Hybrid Nanowire-MOS circuit architectures: from basic physics to digital and analog applications

Mihai Adrian Ionescu, Didier Bouvet, Vincent Pott, Santanu Mahapatra, Serge Ecoffey

2006

Punch-through impact ionization MOSFET (PIMOS): From device principle to applications

Mihai Adrian Ionescu, Maher Kayal, Didier Bouvet, Kirsten Emilie Moselund, Vincent Pott, Cédric Meinen

In the present work a punch-through impact ionization MOSFET (PIMOS) is presented, which exploits impact ionization in low-doped body-tied [Omega]- and tri-gate structures to obtain abrupt switching (3-10 mV/decade) combined with a hysteresis in the ID(VDS ...

2008

Gate-all-around MOSFETs: true fabrication and characteristics

Mihai Adrian Ionescu, Didier Bouvet, Kirsten Emilie Moselund, Vincent Pott

2006

A hybrid CMOS-SET co-fabrication platform using nano-grain polysilicon wires

Mihai Adrian Ionescu, Didier Bouvet, Vincent Pott, Santanu Mahapatra, Serge Ecoffey

This paper presents a process for the co-fabrication of self-aligned NMOS and single electron transistors made by gated polysilicon wires. The realization of SET–MOS hybrid architectures is also reported. The proposed process exploits an original low energ ...

2005

Low temperature single electron characteristics in gate-all-around MOSFET

Mihai Adrian Ionescu, Didier Bouvet, Kirsten Emilie Moselund, Vincent Pott

2006

Downscaling and Short Channel Effects in Twin Gate Junctionless Vertical Slit FETs

Jean-Michel Sallese, Farzan Jazaeri, Didier Bouvet, Lucian Barbut

we present the performance constraints in the design of ultra-thin body Junctionless Vertical Slit Field Effect Transistor (JL VeSFET). A design space that take into account the intrinsic off-current, the sub-threshold swing and the drain induced barrier l ...

2013

Investigation of oxidation-induced strain in a top-down Si nanowire platform

Mihai Adrian Ionescu, Didier Bouvet, Mohammad Najmzadeh

In this paper, we investigate the effect of different process parameters on oxidation-induced strain (OIS) into a doubly-clamped silicon nanowire FET to control and finally, enhance carrier mobility. Spacer technology together with sacrificial thermal oxid ...

Elsevier2009

Electrical conduction in 10nm-thin polysilicon wires from 4K to 400K and their operation for hybrid memory

Mihai Adrian Ionescu, Didier Bouvet, Serge Ecoffey

2005

Micro-Electro-Mechanical Metal-Air-Insulator-Semiconductor Diode Switch

Mihai Adrian Ionescu, Didier Bouvet, Donatello Acquaviva

The design, fabrication and characterization of Micro-electro-mechanical metal-air-insulator-semiconductor (MEM-MAIS) diode switch are originally reported. An abrupt switching from off-state to Fowler-Nordheim tunneling current in on-state is induced by th ...

2008

Polyimide sacrificial layer for SOI SG-MOSFET pressure sensor

Mihai Adrian Ionescu, Didier Bouvet, Montserrat Fernandez-Bolanos Badia, Vincent Pott, Georges-André Racine, Nicolas Abelé

This paper reports on the fabrication and electrical characterization of a novel pressure sensor based on a suspended-gate MOSFET (SG-MOSFET) using a new polyimide process. The device is composed of a SG-MOSFET built on a thin SOI membrane released by a ba ...

Elsevier2006

Didier Bouvet

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Capacitive nanoelectromechanical switch based on suspended carbon nanotube array

Coulomb blockade in gate-all-around silicon nanowire MOSFETs

Hybrid Nanowire-MOS circuit architectures: from basic physics to digital and analog applications

Punch-through impact ionization MOSFET (PIMOS): From device principle to applications

Gate-all-around MOSFETs: true fabrication and characteristics

A hybrid CMOS-SET co-fabrication platform using nano-grain polysilicon wires

Low temperature single electron characteristics in gate-all-around MOSFET

Downscaling and Short Channel Effects in Twin Gate Junctionless Vertical Slit FETs

Investigation of oxidation-induced strain in a top-down Si nanowire platform

Electrical conduction in 10nm-thin polysilicon wires from 4K to 400K and their operation for hybrid memory

Micro-Electro-Mechanical Metal-Air-Insulator-Semiconductor Diode Switch

Polyimide sacrificial layer for SOI SG-MOSFET pressure sensor

High Quality Factor Copper Inductors Integrated in Deep Dry Etched Quartz Substrates

Local volume inversion and corner effects in triangular gate-all-around MOSFETs

Fabrication of polysilicon gated-nanowires and their application for pA precision current measurements

Polyimide sacrificial layer process for SOI SG-MOSFET pressure sensor

High Performance Copper / Polyimide Inductors Fabricated Using Thick Double Metal Layer Damascene Process