Publication

A Complete Network-On-Chip Emulation Framework

Publications associées (32)

Speed detection of battery-free nodes based on RF Wireless Power Transfer

In the Internet of Things (IoT) era, Wireless Sensor Networks (WSNs) are rapidly increasing in terms of relevance and pervasiveness thanks to their notable real-time monitoring performance across several fields, including industrial, domestic, military, bi ...

IEEE2020

Advanced Techniques for Powering Wireless Sensor Nodes through Energy Harvesting and Wireless Power Transfer

Roberto La Rosa

This paper presents three different techniques for efficiently powering an energy-autonomous wireless sensor (EAWS) through both energy harvesting (EH) and RF wireless power transfer (WPT). The aim of the paper is to provide effective strategies and techni ...

IEEE2020

Energy- and Cost-Efficient VLSI DSP Systems Design with Approximate Computing

Reza Ghanaatian Jahromi

Technology scaling has progressed to enable integrated circuits with extremely high density enabling systems of tremendous complexity with manageable power consumption. With the continuation of Moore's law for many years, electronic chips have been able to ...

EPFL2020

A Real-Time Multi-Camera Depth Estimation ASIC with Custom On-Chip Embedded DRAM

Jonathan Emmanuel D Narinx

The capability to process high-resolution videos in real-time is becoming more important in a wide variety of applications such as autonomous vehicles, virtual reality or intelligent surveillance systems. The high-accuracy and complex video processing algo ...

EPFL2019

Single-photon avalanche diode imagers in biophotonics: review and outlook

Claudio Bruschini, Edoardo Charbon, Samuel Burri, Ivan Michel Antolovic, Harald Arjan Robert Homulle

Single-photon avalanche diode (SPAD) arrays are solid-state detectors that offer imaging capabilities at the level of individual photons, with unparalleled photon counting and time-resolved performance. This fascinating technology has progressed at a very ...

2019

Improving Main-memory Database System Performance through Cooperative Multitasking

Georgios Psaropoulos

Database systems access memory either sequentially or randomly. Contrary to sequential access and despite the extensive efforts of computer architects, compiler writers, and system builders, random access to data larger than the processor cache has been s ...

EPFL2019

Reconciling Being in-Control vs. Being Helped for the Execution of Complex Movements in VR

Ronan Boulic, Bruno Herbelin, Thibault Serge Mario Porssut

Performing motor tasks in virtual environments is best achieved with motion capture and animation of a 3D character that participants control in real time and perceive as being their avatar in the virtual environment. A strong Sense of Embodiment (SoE) for ...

IEEE2019

Design Optimization of 3D Multi-Processor System-on-Chip with Integrated Flow Cell Arrays

David Atienza Alonso, Ayse Kivilcim Coskun, Artem Andreev, Marina Zapater Sancho, Fulya Kaplan

Integrated flow cell array (FCA) is an emerging technology, targeting the cooling and power delivery challenges of modern 2D/3D Multi-Processor Systems-on-Chip (MPSoCs). In FCA, electrolytic solutions are pumped through microchannels etched in the silicon ...

2018

Learning-Based Hardware Design for Data Acquisition Systems

Cosimo Aprile

This multidisciplinary research work aims to investigate the optimized information extraction from signals or data volumes and to develop tailored hardware implementations that trade-off the complexity of data acquisition with that of data processing, conc ...

EPFL2018

FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin

In this paper, we developed a simulation-based architecture evaluation framework for field-programmable gate arrays (FPGAs), called FPGA-SPICE, which enables automatic layout-level estimation and electrical simulations of FPGA architectures. FPGA-SPICE can ...

2018

Trading off Energy versus Accuracy in Modern Computing Systems : From Digital Circuit Design to Programming Techniques

Jérémy Lucien Maurice Schlachter

The slowdown of Moore's law, which has been the driving force of the electronics industry over the last 5 decades, is causing serious problem to Integrated Circuits (ICs) improvements. Technology scaling is becoming more and more complex and fabrication co ...

EPFL2018

LTRF: Enabling High-Capacity Register Files for GPUs via Hardware/Software Cooperative Register Prefetching

Babak Falsafi, Hamid Sarbazi-Azad, Mario Paulo Drumond Lages De Oliveira, Seyed Borna Ehsani

Graphics Processing Units (GPUs) employ large register files to accommodate all active threads and accelerate context switching. Unfortunately, register files are a scalability bottleneck for future GPUs due to long access latency, high power consumption, ...

2018