Physically clustered Forward Body Biasing for variability compensation in nanometer CMOS design

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Publications associées (31)

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The capability to process high-resolution videos in real-time is becoming more important in a wide variety of applications such as autonomous vehicles, virtual reality or intelligent surveillance systems. The high-accuracy and complex video processing algo ...

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Subthreshold Mismatch in Nanometer CMOS at Cryogenic Temperatures

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Cryogenic device models are essential for the reliable design of the cryo-CMOS interface that enables large-scale quantum computers. In this paper, mismatch characterization and modeling of a 40-nm bulk CMOS process over the 4.2-300 K temperature range is ...

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Exploration of Negative Capacitance Devices and Technologies

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Conventional device scaling has been the main guiding principle of the MOS device engineering over these past years. However, this aggressive scaling would be eventually limited due to the inability to remove the heat generated by MOSFET devices. The power ...

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Power Analysis Resilient SRAM Design Implemented with a 1% Area Overhead Impedance Randomization Unit for Security Applications

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Power analysis attacks are an effective tool to extract sensitive information using side-channel analysis, forming a serious threat to IoT systems-on-a-chip (SoCs). Embedded memories implemented with conventional 6T SRAM macrocells often dominate the area ...

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A 6.5-GHz Cryogenic All-Pass Filter Circulator in 40-nm CMOS for Quantum Computing Applications

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Cryogenic solid-state quantum processors require classical control and readout electronics; to achieve compactness and scalability, cryogenic integrated circuits have been recently proposed for this goal. Circulators are widely used in readout circuits, ho ...

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Trading off Energy versus Accuracy in Modern Computing Systems : From Digital Circuit Design to Programming Techniques

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The slowdown of Moore's law, which has been the driving force of the electronics industry over the last 5 decades, is causing serious problem to Integrated Circuits (ICs) improvements. Technology scaling is becoming more and more complex and fabrication co ...

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In the Internet-of-Things (IoT) era, there is an increasing trend to enable intelligent behavior in edge computing sensors. Thus, a new generation of smart wearable devices for health monitoring is being developed, able to perform complex Digital Signal Pr ...

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Design techniques for a stable operation of cryogenic field-programmable gate arrays

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In this paper, we show how a deep-submicron field-programmable gate array (FPGA) can be operated more stably at extremely low temperatures through special firmware design techniques. Stability at low temperatures is limited through long power supply wires ...

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High voltage metal oxide thin film transistors to drive arrays of dielectric elastomer actuators

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This thesis advances the field of high-voltage thin film transistors (HVTFTs) and dielectric elastomer actuators (DEAs) by demonstrating a strategy for low-voltage addressing of an array of high voltage soft actuators suspended on a flexible substrate. Fi ...

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FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin

In this paper, we developed a simulation-based architecture evaluation framework for field-programmable gate arrays (FPGAs), called FPGA-SPICE, which enables automatic layout-level estimation and electrical simulations of FPGA architectures. FPGA-SPICE can ...

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Automated Integration of Dual-Edge Clocking for Low-Power Operation in Nanometer Nodes

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Clocking power, including both clock distribution and registers, has long been one of the primary factors in the total power consumption of many digital systems. One straightforward approach to reduce this power consumption is to apply dual-edge-triggered ...

Association for Computing Machinery2017

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