RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks

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Publications associées (31)

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Resistive random access memory based multiplexers and field programmable gate arrays

Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Gain Kim, Xifan Tang

Resistive random access memory (RRAM) based multiplexers and field programmable gate arrays (FPGAs) are provided. The RRAM-based multiplexers and FPGAs include a 4T1R programming structure to program the RRAMs. The programming structure includes two progra ...

2018

FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang, Edouard Giacomin

In this paper, we developed a simulation-based architecture evaluation framework for field-programmable gate arrays (FPGAs), called FPGA-SPICE, which enables automatic layout-level estimation and electrical simulations of FPGA architectures. FPGA-SPICE can ...

2018

Adaptive Body Biasing in Strong Body Factor Technologies

Thomas Christoph Müller

With the advent of intelligent sensor nodes in everyday life, low power aspects of system design become more and more important. Adaptive body biasing is a promising methodology to achieve dynamic adaptation of the tradeoff between performance and energy b ...

EPFL2021

Generalization of Referenceless Timing Mismatch Calibration Methods for Time-Interleaved ADCs

Yusuf Leblebici, Mustafa Kilic, Arda Uran

Calibration of time-interleaved analog-to-digital converters is a problem whose necessity and complexity increase with the number of interleaved channels. In this study, we develop a generic representation of the referenceless timing mismatch calibration s ...

IEEE2018

An order-statistics-inspired, fully-digital readout approach for analog SiPM arrays

Edoardo Charbon, Esteban Venialgo Araujo

In this paper we present a silicon photomultiplier (SiPM) readout system based on a field-programmable gate array (FPGA), which is capable of converting any commercial 16-channel analog SiPM array into a hybrid device with fully-digital readout for applica ...

2018

Reconfigurable Logic Gates Based on Programable Multistable Mechanisms

Simon Nessim Henein, Ilan Vardi, Hubert Pierre-Marie Benoît Schneegans, Mohamed Gamal Abdelrahman Ahmed Zanaty

Binary logic gates are building blocks of computing machines, in particular, electronic computers. One variant is the programable logic gate, also known as the reconfigurable logic gate, in which the logical function implemented can be modified. In this pa ...

2020

Programmable Logic Gates Based On Tunable Multistable Mechanisms

Simon Nessim Henein, Ilan Vardi, Hubert Pierre-Marie Benoît Schneegans, Mohamed Gamal Abdelrahman Ahmed Zanaty

Binary logic operations are the building blocks of computing machines. In this paper, we present a new programmable binary logic gate based on programmable multistable mechanisms (PMM), which are multistable structures whose stability behavior depends on m ...

AMER SOC MECHANICAL ENGINEERS2020

Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains

Giovanni De Micheli, Paolo Ienne, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Luca Gaetano Amarù, Xifan Tang, Grace Zgheib, Ana Petkovska

Hard-wired carry chains in FPGAs are designed to improve efficiency of important arithmetic primitives. Although they are proven to be effective for arithmetic-rich functions, there are very few studies on the optimization opportunities of carry chains for ...

ACM2017

Plug-and-play TOF-PET Module Readout Based on TDC-on-FPGA and Gigabit Optical Fiber Network

Edoardo Charbon, Esteban Venialgo Araujo

Positron Emission Tomography (PET) scanner technology requires the use of a large number of PET detector modules that work in a parallel and synchronous manner. Moreover, system modularity is a desirable feature, that enables technology reutilization for d ...

IEEE2019

Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Xifan Tang, Edouard Giacomin

Routing multiplexers based on pass-transistors or transmission gates are an essential components in many digital integrated circuits. However, whatever structure is employed, CMOS multiplexers have two major limitations: 1) their delay is linearly related ...

Ieee-Inst Electrical Electronics Engineers Inc2017

Low-Power Design of Digital VLSI Circuits around the Point of First Failure

Andrea Bonetti

As an increase of intelligent and self-powered devices is forecasted for our future everyday life, the implementation of energy-autonomous devices that can wirelessly communicate data from sensors is crucial. Even though techniques such as voltage scaling ...

EPFL2019