RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks

À propos
Confidentialité
Mentions légales

Graph Chatbot

Publications associées (30)

Polarity-Controllable Devices and Circuits for Doping-Free 2D Electronics

Giovanni Vincenzo Resta

The growth of information technology has been sustained by the miniaturization of Complementary Metal-Oxide-Semiconductor (CMOS) Field-Effect Transistors (FETs), with the number of devices per unit area constantly increasing, as exemplified by Mooreâ s la ...

EPFL2019

Doping-Free Complementary Logic Gates Enabled by Two-Dimensional Polarity-Controllable Transistors

Giovanni De Micheli, Pierre-Emmanuel Julien Marc Gaillardon, Giovanni Vincenzo Resta

Atomically thin two-dimensional (2D) materials belonging to transition metal dichalcogenides, due to their physical and electrical properties, are an exceptional vector for the exploration of next-generation semiconductor devices. Among them, due to the po ...

2018

Architecture and Experimental Validation of a Low-Latency Phasor Data Concentrator

Mario Paolone, Paolo Romano, Marco Pignati, Asja Derviskadic

The paper presents the design principles of a Phasor Data Concentrator (PDC) that implements both the absolute and relative time data pushing logics together with a third one that aims at minimizing the latency introduced by the PDC without increasing the ...

2018

Resistive random access memory based multiplexers and field programmable gate arrays

Giovanni De Micheli, Gain Kim, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin

Resistive random access memory (RRAM) based multiplexers and field programmable gate arrays (FPGAs) are provided. The RRAM-based multiplexers and FPGAs include a 4T1R programming structure to program the RRAMs. The programming structure includes two progra ...

2018

FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin

In this paper, we developed a simulation-based architecture evaluation framework for field-programmable gate arrays (FPGAs), called FPGA-SPICE, which enables automatic layout-level estimation and electrical simulations of FPGA architectures. FPGA-SPICE can ...

2018

Generalization of Referenceless Timing Mismatch Calibration Methods for Time-Interleaved ADCs

Yusuf Leblebici, Mustafa Kilic, Arda Uran

Calibration of time-interleaved analog-to-digital converters is a problem whose necessity and complexity increase with the number of interleaved channels. In this study, we develop a generic representation of the referenceless timing mismatch calibration s ...

IEEE2018

An order-statistics-inspired, fully-digital readout approach for analog SiPM arrays

Edoardo Charbon, Esteban Venialgo Araujo

In this paper we present a silicon photomultiplier (SiPM) readout system based on a field-programmable gate array (FPGA), which is capable of converting any commercial 16-channel analog SiPM array into a hybrid device with fully-digital readout for applica ...

2018

Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains

Paolo Ienne, Giovanni De Micheli, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Mathias Soeken, Zhufei Chu

Hard-wired carry chains in FPGAs are designed to improve efficiency of important arithmetic primitives. Although they are proven to be effective for arithmetic-rich functions, there are very few studies on the optimization opportunities of carry chains for ...

ACM2017

Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure

Giovanni De Micheli, Xifan Tang, Pierre-Emmanuel Julien Marc Gaillardon, Edouard Giacomin

Routing multiplexers based on pass-transistors or transmission gates are an essential components in many digital integrated circuits. However, whatever structure is employed, CMOS multiplexers have two major limitations: 1) their delay is linearly related ...

Ieee-Inst Electrical Electronics Engineers Inc2017

Circuit Design, Architecture and CAD for RRAM-based FPGAs

Xifan Tang

Field Programmable Gate Arrays (FPGAs) have been indispensable components of embedded systems and datacenter infrastructures. However, energy efficiency of FPGAs has become a hard barrier preventing their expansion to more application contexts, due to two ...

EPFL2017

Page 2 sur 2