RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks

Chat with Graph Search

Ask any question about EPFL courses, lectures, exercises, research, news, etc. or try the example questions below.

DISCLAIMER: The Graph Chatbot is not programmed to provide explicit or categorical answers to your questions. Rather, it transforms your questions into API requests that are distributed across the various IT services officially administered by EPFL. Its purpose is solely to collect and recommend relevant references to content that you can explore to help you answer your questions.

Resistive random access memory (RRAM) based multiplexers and field programmable gate arrays (FPGAs) are provided. The RRAM-based multiplexers and FPGAs include a 4T1R programming structure to program the RRAMs. The programming structure includes two progra ...

In this paper, we developed a simulation-based architecture evaluation framework for field-programmable gate arrays (FPGAs), called FPGA-SPICE, which enables automatic layout-level estimation and electrical simulations of FPGA architectures. FPGA-SPICE can ...

With the advent of intelligent sensor nodes in everyday life, low power aspects of system design become more and more important. Adaptive body biasing is a promising methodology to achieve dynamic adaptation of the tradeoff between performance and energy b ...

Calibration of time-interleaved analog-to-digital converters is a problem whose necessity and complexity increase with the number of interleaved channels. In this study, we develop a generic representation of the referenceless timing mismatch calibration s ...

In this paper we present a silicon photomultiplier (SiPM) readout system based on a field-programmable gate array (FPGA), which is capable of converting any commercial 16-channel analog SiPM array into a hybrid device with fully-digital readout for applica ...

Binary logic gates are building blocks of computing machines, in particular, electronic computers. One variant is the programable logic gate, also known as the reconfigurable logic gate, in which the logical function implemented can be modified. In this pa ...

Binary logic operations are the building blocks of computing machines. In this paper, we present a new programmable binary logic gate based on programmable multistable mechanisms (PMM), which are multistable structures whose stability behavior depends on m ...

Hard-wired carry chains in FPGAs are designed to improve efficiency of important arithmetic primitives. Although they are proven to be effective for arithmetic-rich functions, there are very few studies on the optimization opportunities of carry chains for ...

Positron Emission Tomography (PET) scanner technology requires the use of a large number of PET detector modules that work in a parallel and synchronous manner. Moreover, system modularity is a desirable feature, that enables technology reutilization for d ...

Routing multiplexers based on pass-transistors or transmission gates are an essential components in many digital integrated circuits. However, whatever structure is employed, CMOS multiplexers have two major limitations: 1) their delay is linearly related ...

As an increase of intelligent and self-powered devices is forecasted for our future everyday life, the implementation of energy-autonomous devices that can wirelessly communicate data from sensors is crucial. Even though techniques such as voltage scaling ...

RDS: FPGA Routing Delay Sensors for Effective Remote Power Analysis Attacks

Chat with Graph Search

Resistive random access memory based multiplexers and field programmable gate arrays

FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs

Adaptive Body Biasing in Strong Body Factor Technologies

Generalization of Referenceless Timing Mismatch Calibration Methods for Time-Interleaved ADCs

An order-statistics-inspired, fully-digital readout approach for analog SiPM arrays

Reconfigurable Logic Gates Based on Programable Multistable Mechanisms

Programmable Logic Gates Based On Tunable Multistable Mechanisms

Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains

Plug-and-play TOF-PET Module Readout Based on TDC-on-FPGA and Gigabit Optical Fiber Network

Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure

Low-Power Design of Digital VLSI Circuits around the Point of First Failure