Sanidhya KashyapSanidhya Kashyap is a systems researcher and an assistant professor at the EPFL School of Computer and Communication Sciences (IC). His research focuses on designing systems software that are performant and robust for heterogeneous hardware. He is broadly interested in the area of systems with a particular focus on operating systems, databases, concurrency, scheduling, networks, data analytics, and software testing (fuzzing).
Thomas Emile BourgeatEnseignement et PhD Doctorant·es actuel·les Neelu Shivprakash Kalani, Jiawei Lin, Alexandre Pinazza, Jiacheng Ma, Martina Camaioni, Guokai Chen, Mohammadarman Soleimani Cours Computer security and privacy COM-301 C'est un cours d'introduction à la sécurité informatique et privée. L'objectif est de fournir aux étudiants les moyens de raisonner sur les problèmes de sécurité et de confidentialité et de leur donner les moyens de les affronter. Constructive Computer Architecture CS-62
Andrei ArdeleanAndrei Ardelean received the B.Sc. degree in Electronics from "Politehnica" University of Timisoara, Timisoara, Romania, in 2015, and the M.Sc. degree in Microelectronics from the Delft University of Technology, Delft, Netherlands, in 2017. He is currently working towards his Ph.D. in the AQUA Laboratory at EPFL. His main research interests are single-photon counting time-correlated image sensors for real time phasor-based fluorescence lifetime imaging microscopy.
Ayatallah Ahmed Gamal Kamal ElakhrasExpertise
Dataflow ArchitectureHigh-Level Synthesis
Ayatallah is a Ph.D. student in the Processor Architecture Laboratory, advised by Professor Paolo Ienne. Between October 2023 and March 2024, she did an internship at AMD in the Research and Advanced Development team, under the supervision of Dr. Kristof Denolf. She received a B.Sc. degree in Computer Engineering from the American University in Cairo, Egypt in 2020 and started her Ph.D. in the same year.Her research interests include dataflow architecture,
Francesca RodinoExpertise
Electrochemical BiosensorsSensors and Biosensors interfaces | front-end electronicsBiomedical circuits and systems
RechercheOther Tavakolidakhrabadi, A., Domange, T., Nalm, C., Rodino, F., Meimandi, A., Bessire, C., & Carrara, S. (2024). A Novel Microfluidic System for Capacitive Detection via Magnetophoretic Separation of Malaria-Infected Red Blood Cells. IEEE Sensors Letters. DOI: 10.1109/LSENS.2024.3451238Barbruni, G. L., Rodino, F., Ros, P. M., Demarchi, D., Ghezzi, D., & Carrara, S. (2024). A
Alexandre Sébastien Julien WillommetEnseignement et PhD Cours Fundamentals of VLSI design EE-429 Le cours présente les principes fondamentaux des circuits intégrés numériques et les aspects technologiques du point de vue des concepteurs. Il se concentre principalement sur le niveau des transistors, mais discute également de l'extension aux grandes conceptions numériques semi-personnalisées. Lab in advanced VLSI design EE-490(b) Ces labs couvrent les techniques avancées de conception de circuit integrés. Méthode
Karan PathakExpertise
System Architect 2023 - (Ex-IMEC)Performance estimation and Analysis. CPU Micro-architecture (BP, TLB Pref., Cache Pref., etc.) Full System Simulation (gem5, QEMU)BSP, BIOS, System FirmwaresProgramming Models for LLMs for CXL-CPU-GPU systems (HPC+AI)FPGA Prototyping (CHISEL to Bitstream), OS support, FS over Network, DMA in FPGAs
Current Work
CXLRAMSim v1.0 : Supporting CXL devices in Full System Simulator. CXLRAMSim v2.0: Extensions for CXL switch in FS SimulatorCXL-PNM: Exploring new programming
Mathias Josef PayerMathias Payer is a security researcher and professor at the EPFL school of computer and communication sciences (IC), leading the HexHive group. His research focuses on protecting applications in the presence of vulnerabilities, with a focus on memory corruption and type violations. He is interested in software security, system security, binary exploitation, effective mitigations, fault isolation/privilege separation, strong sanitization, and software testing (fuzzing) using a combination of binary analysis and compiler-based techniques. More details are available in his CV.
Cyrus Thibault LognonnéCyrus Lognonné-Khalatbari est artiste, designer et doctorant dans le programme conjoint entre la Haute école d'art et de design de Genève (HEAD & Genève, HES-SO) et l'école polytechnique fédérale de Lausanne (EPFL). Dans le cadre de sa thèse, Cyrus articule travail de terrain ethnographique, études des sciences et des technologies (STS) et méthodologies issues de l'art et du design pour interroger, à l'échelle de l'unité de traitement graphique (GPU), les implications écologiques de la puissance de calcul e
