Sanidhya KashyapSanidhya Kashyap is a systems researcher and an assistant professor at the EPFL School of Computer and Communication Sciences (IC). His research focuses on designing systems software that are performant and robust for heterogeneous hardware. He is broadly interested in the area of systems with a particular focus on operating systems, databases, concurrency, scheduling, networks, data analytics, and software testing (fuzzing).
Thomas Emile BourgeatTeaching & PhD PhD Students Neelu Shivprakash Kalani, Jiawei Lin, Alexandre Pinazza, Jiacheng Ma, Martina Camaioni, Guokai Chen, Mohammadarman Soleimani Courses Computer security and privacy COM-301 This is an introductory course to computer security and privacy. Its goal is to provide students with means to reason about security and privacy problems, and provide them with tools to confront them. Constructive Computer Architecture CS-629 Beginning with a basic pipeline proc
Andrei ArdeleanAndrei Ardelean received the B.Sc. degree in Electronics from "Politehnica" University of Timisoara, Timisoara, Romania, in 2015, and the M.Sc. degree in Microelectronics from the Delft University of Technology, Delft, Netherlands, in 2017. He is currently working towards his Ph.D. in the AQUA Laboratory at EPFL. His main research interests are single-photon counting time-correlated image sensors for real time phasor-based fluorescence lifetime imaging microscopy.
Ayatallah Ahmed Gamal Kamal ElakhrasExpertise
Dataflow ArchitectureHigh-Level Synthesis
Ayatallah is a Ph.D. student in the Processor Architecture Laboratory, advised by Professor Paolo Ienne. Between October 2023 and March 2024, she did an internship at AMD in the Research and Advanced Development team, under the supervision of Dr. Kristof Denolf. She received a B.Sc. degree in Computer Engineering from the American University in Cairo, Egypt in 2020 and started her Ph.D. in the same year.Her research interests include dataflow architecture,
Francesca RodinoExpertise
Electrochemical BiosensorsSensors and Biosensors interfaces | front-end electronicsBiomedical circuits and systems
Francesca Rodino received the B.Sc. and M.Sc. degrees in Biomedical Engineering from the Politecnico di Torino, Turin, Italy, in 2019 and 2022, respectively. She developed her Master's project in the field of cortical neuroprosthesis devices for artificial vision in collaboration with the Integrated Circuits Laboratory (ICLAB) at école Polytechnique Fédérale de Lausanne (EPFL) in Swit
Alexandre Sébastien Julien WillommetEducation 3D high density memory based on emering resistive technologies : circuit and architecture design | Microelectronics 2014 – 2017 CEA-Leti
Teaching & PhD Courses Fundamentals of VLSI design EE-429 The course introduces the fundamentals of digital integrated circuits and the technology aspects from a designers perspective. It focuses mostly on transistor level, but discusses also the extension to large digital semicustom designs. Lab in advanced VLSI design
Karan PathakExpertise
System Architect 2023 - (Ex-IMEC)Performance estimation and Analysis. CPU Micro-architecture (BP, TLB Pref., Cache Pref., etc.) Full System Simulation (gem5, QEMU)BSP, BIOS, System FirmwaresProgramming Models for LLMs for CXL-CPU-GPU systems (HPC+AI)FPGA Prototyping (CHISEL to Bitstream), OS support, FS over Network, DMA in FPGAs
Current Work
CXLRAMSim v1.0 : Supporting CXL devices in Full System Simulator. CXLRAMSim v2.0: Extensions for CXL switch in FS SimulatorCXL-PNM: Exploring new programming
Mathias Josef PayerMathias Payer is a security researcher and professor at the EPFL school of computer and communication sciences (IC), leading the HexHive group. His research focuses on protecting applications in the presence of vulnerabilities, with a focus on memory corruption and type violations. He is interested in software security, system security, binary exploitation, effective mitigations, fault isolation/privilege separation, strong sanitization, and software testing (fuzzing) using a combination of binary analysis and compiler-based techniques. More details are available in his CV.
Cyrus Thibault LognonnéCyrus Lognonné-Khalatbari is an artist, designer and PhD candidate of the joint program between the Geneva Arts and Design University (HEAD & Genève, HES-SO) and the Swiss Federal Institute of Technology (EPFL). Inside his PhD, Cyrus bridges ethnographic fieldwork, Science and Technology Studies (STS) with arts and design methodologies in order to address, at the level of the Graphical Processing Unit (GPU), the ecological implications of computing power and the digital. Cyrus' research has been published b
