Publications de Luca Benini | EPFL Graph Search

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Current Systems-On-Chip (SoC) execute applications that demand extensive parallel processing; thus, the amount of processors, memories and application-specific signal pro- cessing cores is rapidly increasing. In these new Multi- Processor SoCs, (MPSoCs) on ...

Nanometer CMOS scaling has resulted in greatly increased circuit variability, with extremely adverse consequences on design predictability and yield. A number of recent works have focused on adaptive post-fabrication tuning approaches to mitigate this prob ...

Recent advances in biosensing technologies have led to applications of biosensor probe arrays for rapid identification of biological agents such as drugs, gene expressions, proteins, cholesterol and fats in an input sample. However, monitoring the simultan ...

With technology scaling, the wire delay as a fraction of the total delay is increasing, and the communication architecture is becoming a major bottleneck for system performance in systems on chip (SoCs). A communication-centric design paradigm, networks on ...

With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor Systems-On-Chip (MPSoCs) consisting of complex integrated components communicating with each other at very high-speed rates. Intercommunication ...

Designing a power-efficient interconnection architec- ture for MultiProcessor Systems-on-Chips (MPSoCs) satisfying the application performance constraints is a nontrivial task. In order to meet the tight time-to-market constraints and to effec- tively hand ...

New tendencies in the consumer electronics market present Multi-Processor Systems-On-Chip (MPSoCs) as a promising solution for meeting the processing demands of upcoming generations of user applications. MPSoCs are complex to design, as they must execute m ...

This paper introduces SIMinG-1k-a manycore simulator infrastructure. SIMinG-1k is a graphics processing unit accelerated, parallel simulator for design-space exploration of large-scale manycore systems. It features an optimal trade-off between modeling acc ...

With technology advances, the number of cores integrated on a chip and their speed of operation is increasing. This, in turn is leading to a significant increase in chip temperature. Temperature gradi- ents and hot-spots not only affect the performance of ...

Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power density, which may lead to thermal runaway if coupled with low-cost packaging and ...

Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (NoCs) are necessary to efficiently handle the 3D interconnect complexity. Desi ...

Research on Networks on Chips (NoCs) has spanned over a decade and its results are now visible in some products. Thus the seminal idea of using networking technology to address the chip-level interconnect problem has been shown to be correct. Moreover, as ...

Through silicon vias (TSVs) provide an efficient way to support vertical communication among different layers of a vertically stacked chip, enabling scalable 3-D networks-on-chip (NoC) architectures. Unfortunately, low TSV yields significantly impact the f ...

As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) support against permanent and intermittent faults that can occur in the system. ...

With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor System-On-Chip (MPSoC) architectures have become widespread. These new systems are very complex to design as they must execute multiple co ...

Co-clustering has not been much exploited in biomedical in- formatics, despite its success in other domains. Most of the previous applications were limited to analyzing gene expression data. We performed co-clustering analysis on other types of data and ob ...

Multi-Processor Systems-on-Chip (MPSoCs) are penetrating the electronics market as a powerful, yet commercially viable, solution to answer the strong and steadily growing demand for scalable and high performance systems, at limited design complexity. Howev ...

The goal of thermal management is to meet maximum operating temperature constraints, while at the same time tracking timevarying performance requirements. Current approaches avoid thermal violations by forcing abrupt operating points changes (e.g. processo ...

On-chip wires are becoming unreliable as the effect of various noise sources increases with technology scaling. This leads to unpredictable timing delay variations on the interconnect wires. There is a significant need to mitigate the effect of parasitics ...

Luca Benini

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NoC emulation: a tool and design flow for MPSoC

Physically clustered Forward Body Biasing for variability compensation in nanometer CMOS design

Physically clustered forward body biasing for variability compensation in nanometer CMOS design

Methods for Designing Reliable Probe Arrays

Timing-Error-Tolerant Network-on-Chip Design Methodology

Network-On-Chip Design and Synthesis Outlook

An Application-Specific Design Methodology for On-chip Crossbar Generation

Application of FPGA Emulation to SoC Floorplan and Packaging Exploration

SIMinG-1k: A thousand-core simulator running on general-purpose graphical processing units

Temperature Control of High Performance Multicore Platforms Using Convex Optimization

Multi-Processor Operating System Emulation Framework with Thermal Feedback for Systems-on-Chip

Synthesis of Networks on Chips for 3D Systems on Chips

Networks on Chips: From Research to Products

Characterization and Implementation of Fault-Tolerant Vertical Links for 3-D Networks-on-Chip

Reliability Support for On-chip Memories Using Networks-on-Chips

A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework

Co-clustering : A versatile Tool for Data Analysis in Biomedical Informatics

Thermal-Aware System-Level Modeling and Management for Multi-Processor Systems-on-Chip

Multicore Thermal Management with Model Predictive Control

Comparison of a Timing-Error Tolerant Scheme with a Traditional Re-transmission Mechanism for Networks on Chips