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David Atienza Alonso

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Publications associées (385)

Impact of Memory Voltage Scaling on Accuracy and Resilience of Deep Learning Based Edge Devices

David Atienza Alonso, Andreas Peter Burg, Martino Ruggiero, Benoît Walter Denkinger, Soumya Subhra Basu, Andrea Bonetti, Szabolcs Balási, Miguel Peon Quiros, Flavio Ponzina

Energy consumption is a significant obstacle to integrate deep learning into edge devices. Two common techniques to curve it are quantization, which reduces the size of the memories (static energy) and the number of accesses (dynamic energy), and voltage s ...

2020

Robust Epileptic Seizure Detection on Wearable Systems with Reduced False-Alarm Rate

David Atienza Alonso, Amir Aminifar, Renato Zanetti

Epilepsy affects more than 50 million people and ranks among the most common neurological diseases worldwide. Despite advances in treatment, one-third of patients still suffer from refractory epilepsy. Wearable devices for real-time patient monitoring can ...

IEEE2020

Resource Management for Power-Constrained HEVC Transcoding Using Reinforcement Learning

David Atienza Alonso, Marina Zapater Sancho, Arman Iranfar, Luis Maria Costero Valero

The advent of online video streaming services along with the users' demand for high-quality contents require High Efficiency Video Coding (HEVC), which provides higher quality and compression at the cost of increased complexity. On one hand, HEVC exposes a ...

2020

Enabling Optimal Power Generation of Flow Cell Arrays in 3D MPSoCs with On-Chip Switched Capacitor Converters

David Atienza Alonso, Halima Najibi, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse

Flow cell arrays (FCAs) provide efficient on-chip liquid cooling and electrochemical power generation capabilities in three-dimensional multi-processor systems-on-chip (3DMPSoCs). When connected to power delivery networks (PDNs) of chips, the current flowi ...

IEEE2020

A Hybrid Cache HW/SW Stack for Optimizing Neural Network Runtime, Power and Endurance

David Atienza Alonso, William Andrew Simon, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse

Hybrid caches consisting of both SRAM and emerging Non-Volatile Random Access Memory (eNVRAM) bitcells increase cache capacity and reduce power consumption by taking advantage of eNVRAM's small area footprint and low leakage energy. However, they also inhe ...

2020

Blade: An in-Cache Computing Architecture for Edge Devices

David Atienza Alonso, William Andrew Simon, Marina Zapater Sancho, Yasir Mahmood Qureshi, Alexandre Sébastien Julien Levisse, Marco Antonio Rios

Area and power constrained edge devices are increasingly utilized to perform compute intensive workloads, necessitating increasingly area and power efficient accelerators. In this context, in-SRAM computing performs hundreds of parallel operations on spati ...

2020

Predictive Reliability and Fault Management in Exascale Systems

David Atienza Alonso, Marina Zapater Sancho

Performance and power constraints come together with Complementary Metal Oxide Semiconductor technology scaling in future Exascale systems. Technology scaling makes each individual transistor more prone to faults and, due to the exponential increase in the ...

2020

Self-Aware Machine Learning for Multimodal Workload Monitoring During Manual Labor on Edge Wearable Sensors

David Atienza Alonso, Amir Aminifar, Adriana Arza Valdes, Farnaz Forooghifar, Giulio Masinelli

The design of reliable wearable technologies for real-time and long-term monitoring presents a major challenge. Self-awareness is a promising solution that enables the system to monitor itself in interaction with the environment and to manage its resources ...

2020

The RECIPE approach to challenges in deeply heterogeneous high performance systems

David Atienza Alonso, Marina Zapater Sancho

RECIPE (REliable power and time-ConstraInts-aware Predictive management of heterogeneous Exascale systems) is a recently started project funded within the H2020 FETHPC programme, which is expressly targeted at exploring new High-Performance Computing (HPC) ...

ELSEVIER2020

Exploration Methodology for BTI-Induced Failures on RRAM-Based Edge AI Systems

David Atienza Alonso, Miguel Peon Quiros, Alexandre Sébastien Julien Levisse, Marco Antonio Rios

Resistive switching memory technologies (RRAM) are seen by most of the scientific community as an enabler for Edge-level applications such as embedded deep Learning, AI or signal processing of audio and video signals. However, going beyond a "simple'' repl ...

IEEE2020

Genome Sequence Alignment - Design Space Exploration for Optimal Performance and Energy Architectures

David Atienza Alonso, Marina Zapater Sancho, Yasir Mahmood Qureshi, José Manuel Herruzo Ruiz

Next generation workloads, such as genome sequencing, have an astounding impact in the healthcare sector. Sequence alignment, the first step in genome sequencing, has experienced recent breakthroughs, which resulted in next generation sequencing (NGS). As ...

2020

Towards Deeply Scaled 3D MPSoCs with Integrated Flow Cell Array Technology

David Atienza Alonso, Mohamed Mostafa Sabry Aly, Halima Najibi, Marina Zapater Sancho, Alexandre Sébastien Julien Levisse

Deeply-scaled three-dimensional (3D) Multi-Processor Systems-on-Chip (MPSoCs) enable high performance and massive communication bandwidth for next-generation computing. However, as process nodes shrink, temperature-dependent leakage dramatically increases, ...

2020

Accelerating Inference on Binary Neural Networks with Digital RRAM Processing

David Atienza Alonso, Marina Zapater Sancho, Yasir Mahmood Qureshi

The need for efficient Convolutional Neural Network (CNNs) targeting embedded systems led to the popularization of Binary Neural Networks (BNNs), which significantly reduce execution time and memory requirements by representing the operands using only one ...

Springer Nature2020

Cognitive workload monitoring in virtual reality based rescue missions with drones

David Atienza Alonso, Fabio Isidoro Tiberio Dell'Agnola, Adriana Arza Valdes, Niloofar Momeni

The use of drones in search and rescue (SAR) missions can be very cognitively demanding. Since high levels of cognitive workload can negatively affect human performance, there is a risk of compromising the mission and leading to failure with catastrophic o ...

2020

EEG Correlates of Difficulty Levels in Dynamical Transitions of Simulated Flying and Mapping Tasks

Ricardo Andres Chavarriaga Lozano, José del Rocio Millán Ruiz, David Atienza Alonso, Fabio Isidoro Tiberio Dell'Agnola, Ping-Keng Jao, Adriana Arza Valdes

Decoding the subjective perception of task difficulty may help improve operator performance, i.e., automatically optimize the task difficulty level. Here, we aim to decode a compound of cognitive states that covaries with the task difficulty level. We desi ...

2020

Noise-Resilient and Interpretable Epileptic Seizure Detection

David Atienza Alonso, Amir Aminifar, Anthony Hitchcock Thomas

Deep convolutional neural networks have recently emerged as a state-of-the art tool in detection of seizures. Such models offer the ability to extract complex nonlinear representations of an electroencephalogram (EEG) signal which can improve accuracy over ...

IEEE2020

Write Termination circuits for RRAM : A Holistic Approach From Technology to Application Considerations

David Atienza Alonso, Alexandre Sébastien Julien Levisse, Marco Antonio Rios

While Resistive Random Access Memories (RRAM) are perceived nowadays as a promising solution for the future of computing, these technologies suffer from intrinsic variability regarding programming voltage, switching speed and achieved resistance values. Wr ...

IEEE2020

Noninvasive detection of focal seizures in ambulatory patients

David Atienza Alonso, Leila Cammoun

Reliably detecting focal seizures without secondary generalization during daily life activities, chronically, using convenient portable or wearable devices, would offer patients with active epilepsy a number of potential benefits, such as providing more re ...

2020

Analysis of Functional Errors Produced by Long-Term Workload-Dependent BTI Degradation in Ultra-Low Power Processors

David Atienza Alonso, Ruben Braojos Lopez, Loris Gérard Duch, Miguel Peon Quiros, Alexandre Sébastien Julien Levisse

Aging effects in digital circuits change the switching characteristics of their transistors, resulting in timing violations that can lead to functional errors at the system level. In particular, BTI is a degradation effect that changes the threshold voltag ...

2020

RRAM-VAC: A Variability-Aware Controller for RRAM-based Memory Architectures

David Atienza Alonso, Alexandre Sébastien Julien Levisse, Marco Antonio Rios, Shikhar Tuli

The growing need for connected, smart and energy efficient devices requires them to provide both ultra-low standby power and relatively high computing capabilities when awoken. In this context, emerging resistive memory technologies (RRAM) appear as a prom ...

2020

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