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Yusuf Leblebici

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Publications associées (405)

Monolithic Fabrication of Silicon Nanowires Bridging Thick Silicon Structures

Yusuf Leblebici, Oliver Peric, Davide Sacchetto, Zuhal Tasdemir

A monolithic process is developed for the fabrication of Si nanowires within thick Si substrates. A combination of anisotropic etch and sidewall passivation is utilized to protect and release Si lines during the subsequent deep etch. An etch depth of 10 mu ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2018

An area and power efficient on-the-fly LBCS transformation for implantable neuronal signal acquisition systems

Yusuf Leblebici, Volkan Cevher, Cosimo Aprile, Luca Baldassarre

A power and area efficient hardware encoding system tailored for wireless implantable applications is presented. Constant medical monitoring allowed by implantable devices is the most relevant alternative to current bulky monitoring systems, which, in case ...

ASSOC COMPUTING MACHINERY2018

The key impact of incorporated Al2O3 barrier layer on W-based ReRAM switching performance

Yusuf Leblebici, Jury Sandrini, Elmira Shahrabi, Cecilia Giovinazzo

In this article, we inspected the bipolar resistive switching behavior of W-based ReRAMs, using HfO2 as switching layer. We have shown that the switching properties can be significantly enhanced by incorporating an Al2O3 layer as a barrier layer. It stabil ...

IEEE2018

A 56Gb/s Burst-Mode NRZ Optical Receiver with 6.8ns Power-On and CDR-Lock Time for Adaptive Optical Links in 14nm FinFET CMOS

Yusuf Leblebici, Alessandro Cevrero, Lukas Kull, Thomas Toifl, Ilter Ozkaya

IEEE2018

Impact of conductance drift on multi-PCM synaptic architectures

Yusuf Leblebici, Irem Boybat Kara, Abu Sebastian, Evangelos Eleftheriou

In-memory computing with nanoscale memristive devices such as phase-change memory (PCM) has emerged as an alternative to conventional von Neumann systems to train deep neural networks (DNN) where a synaptic weight is represented by the device conductance. ...

IEEE2018

Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver

Yusuf Leblebici, Alessandro Cevrero, Gain Kim, Lukas Kull, Thomas Toifl, Cosimo Aprile, Ilter Ozkaya

This paper presents a parallel implementation technique of digital equalizer for high-speed wireline serial link receiver (RX). In wireline RX, inter-symbol interference (ISI) is mitigated by continuous-time linear equalizer, and the remaining ISI is cance ...

2018

System Level simulation framework for the ASICs development of a novel particle physics detector

Yusuf Leblebici, Davide Ceresa, Alessandro Caratelli, Simone Scarfì

The simulation of the passage of particles through matter using Monte Carlo methods is broadly used in the development of particle detectors for high energy physics experiments. To develop the readout electronics for the Compact Muon Solenoid (CMS) experim ...

IEEE2018

Hardware Implementation of a Smart Camera with Keypoint Detection and Description

Yusuf Leblebici, Selman Ergünay

Feature detection and description constitute important steps of many computer vision applications such as object detection and panorama stitching. Since those steps are computationally heavy, they might occupy significant portion of the full operation. Alt ...

IEEE2018

A hybrid CDAC-threshold configuring SAR ADC in 28nm FDSOI CMOS

Yusuf Leblebici, Mustafa Kilic, Themistoklis Mavrogordatos

2018

A Row-Column Accessed Dynamic Element Matching DAC Architecture for SAR ADCs

Yusuf Leblebici, Mustafa Kilic, Selman Ergünay

Capacitor mismatch in high resolution Successive Approximation Register (SAR) Analog to Digital Converters (ADCs) causes non-linearity effects that reduce the Spurious-Free Dynamic Range (SFDR). This paper presents a novel dynamic element matching (DEM) te ...

IEEE2018

A 10b SAR ADC with Widely Scalable Sampling Rate and AGC Amplifier Front-End

Yusuf Leblebici, Seyed Armin Tajalli, Ayça Akkaya, Firat Çelik

This paper presents a low power successive approximation register (SAR) ADC and its front-end automatic gain control (AGC) amplifier designed in 65nm CMOS technology. Digitally controlled variable gain amplifier (VGA) in AGC loop is used to maximize the dy ...

IEEE2018

An area and power efficient on-the-fly LBCS transformation for implantable neuronal signal acquisition systems

Yusuf Leblebici, Volkan Cevher, Cosimo Aprile, Luca Baldassarre

A power and area effcient hardware encoding system tailored for wireless implantable applications is presented. Constant medical monitoring allowed by implantable devices is the most relevant alternative to current bulky monitoring systems, which, in case ...

2018

Target Detection with Deep Learning in Polarimetric Imaging

Yusuf Leblebici, Selman Ergünay, Süha Kagan Köse

Polarimetric imaging techniques demonstrate enhanced capabilities in advanced object detection tasks with their capability to discriminate man-made objects from natural background surfaces. While spectral signatures carry information only about material pr ...

SPIE-INT SOC OPTICAL ENGINEERING2018

An Eight lanes 7Gb/s/pin Source Synchronous Single-Ended RX with Equalization and Far-End Crosstalk Cancellation for Backplane Channels

Yusuf Leblebici, Alessandro Cevrero, Lukas Kull, Volkan Cevher, Thomas Toifl, Cosimo Aprile

This paper presents a versatile crosstalk cancellation scheme for single-ended multi-lane backplane links. System-level investigations show that a scheme, which combines analog filters and decision-feedback crosstalk compensation on the receiver (RX) side ...

2018

Energy Harvesting in Microscale with Cavitating Flows

Yusuf Leblebici, Luis Guillermo Villanueva Torrijo, Morteza Ghorbani, Ahmad Reza Motezakker, Ali Mohammadi

Energy harvesting from thermal energy has been widely exploited to achieve energy savings and clean technologies. In this research, a new cost-effective and environment-friendly solution is proposed for the growing individual energy needs thanks to the ene ...

Amer Chemical Soc2017

A DAC Assisted Speed Enhancement Technique for High Resolution SAR ADC

Yusuf Leblebici, Mustafa Kilic

In this paper, a technique aiming at enhancing the conversion speed of asynchronous high resolution SAR ADCs is presented. In conventional SAR ADCs, the capacitive DAC size is growing exponentially with the converter resolution. The settling time of the MS ...

2017

Piezoresistivity characterization of silicon nanowires through monolithic MEMS

Yusuf Leblebici, Mohammad Nasr Esfahani

This paper presents a monolithic approach for the integration of silicon nanowires (Si NWs) with microelectromechanical systems (MEMS). The process is demonstrated for the case of co-fabrication of Si NWs with a 10-μm-thick MEMS on the same silicon-on-insu ...

2017

A Hybrid CDAC-Threshold Configuring SAR ADC in 28nm FDSOI CMOS

Yusuf Leblebici, Mustafa Kilic, Themistoklis Mavrogordatos

In this paper, a 9-bit 1.3 GS/s single channel SAR ADC is presented. In conventional SAR ADCs, the capacitive DAC size grows exponentially with respect to converter resolution. This results in both signal bandwidth and conversion speed reduction. The propo ...

2017

A 64Gb/s 1.4pJ/b NRZ Optical-Receiver Data-Path in 14nm CMOS FinFET

Yusuf Leblebici, Alessandro Cevrero, Lukas Kull, Thomas Toifl, Ilter Ozkaya

This work describes a NRZ receiver data-path fabricated in 14nm bulk FinFET technology and characterized in an 850nm VCSEL based optical link up to 64Gb/s. It achieves 1.42pJ/bit energy efficiency while recovering PRBS-7 data (BER< 10-12) modulated by a VC ...

Ieee2017

Analysis, Optimization, and Modeling of Analog Multi-Tone Serial Data Transceivers

Yusuf Leblebici, Gain Kim, Kiarash Gharibdoust

This paper presents a versatile and fast time-domain architectural modeling framework for high-speed serial data transceivers (TRX) that can employ various analog modulation schemes. We highlight a modeling of TRXs employing an analog multi-tone signaling, ...

2017

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