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Yusuf Leblebici

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Publications associées (405)

An Electrical Model of the Cell-Electrode Interface for High-density Microelectrode Arrays

Alexandre Schmid, Yusuf Leblebici, Neil Joye

A point-contact model is presented, and an areacontact model has been analytically derived in order to model the electrical characteristic of the cell-electrode interface of high-density neuron cultures. The area-contact model is presented as a model more ...

IEEE2008

Real-time high-sensitivity impedance measurement interface for tethered BLM biosensor arrays

Horst Vogel, Samuel Terrettaz, Yusuf Leblebici, Giovanni De Micheli, Luca Benini, Yüksel Temiz, Carlotta Guiducci

This paper presents a switched-capacitor (SC) current integrator circuit for impedance measurement of tethered bilayer lipid membrane (tBLM) biosensors. The circuit comprises a small number of high performance components enabling enhanced experimental flex ...

2008

Current Sensing Completion Detection for Subthreshold Asynchronous Circuits

Eric Vittoz, Yusuf Leblebici, Omer Can Akgun

In this paper a novel completion detection method for self-timed, asynchronous subthreshold circuits is presented. By employing the self-timed operation principle, substantial speed gains in the operation of the asynchronous pipelines can be realized. The ...

2007

Wide tuning range linearity improved biquadratic transconductor-C filter

Yusuf Leblebici, Seyed Armin Tajalli

This article presents a new technique for improving the linearity performance in biquadratic transconductor-C filters. This improvement has been achieved by applying some modifications to the filter topology which considerably relaxes the linearity require ...

2007

Early Wire Characterization for Predictable Network-on-Chip Global Interconnects

Yusuf Leblebici, Stéphane Badel, Ilhan Hatirnaz, Giovanni De Micheli, David Atienza Alonso, Srinivasan Murali

This work envisions a common design methodology, applicable for every interconnect level and based on early wire characterization, to provide a faster convergence to a feasible and robust design. We claim that such a novel design methodology is vital for u ...

ACM Press New York, NY, US2007

A Bio-Inspired Image Processor for Edge Detection with Single-Electron Circuits

Alexandre Schmid, Yusuf Leblebici

2007

Fault-Tolerant Logic Gates Using Neuromorphic CMOS Circuits

Alexandre Schmid, Yusuf Leblebici, Neil Joye

Fault-tolerant design methods for VLSI circuits, which have traditionally been addressed at system level, will not be adequate for future very-deep submicron CMOS devices where serious degradation of reliability is expected. Therefore, a new design approac ...

IEEE2007

Design and Realization of a Fault-Tolerant 90nm Cryptographic Engine Capable of Performing under Massive Defect Density

Alexandre Schmid, Yusuf Leblebici, Milos Stanisavljevic, Maria Gabrani

This paper presents a new approach for assessing the reliability of nanometer-scale devices prior to fabrication and a practical reliability architecture realization. A four-layer architecture exhibiting a large immunity to permanent as well as random fail ...

ACM2007

A Power-Efficient Clock and Data Recovery Circuit in 0.18-um CMOS Technology for Multi-Channel Short-Haul Optical Data Communication

Paul Victor Georges Muller, Yusuf Leblebici, Seyed Armin Tajalli

This paper studies the specifications of gated-oscillator-based clock and data recovery circuits (GO CDRs) designed for short haul optical data communication systems. Jitter tolerance (JTOL) and frequency tolerance (FTOL) are analyzed and modeled as two ma ...

2007

Ultra Low Power Subthreshold MOS Current Mode Logic Circuits Using a Novel Load Device Concept

Eric Vittoz, Yusuf Leblebici, Seyed Armin Tajalli

This article presents a novel and robust approach for implementing ultra-low power MOS current mode logic (MCML) circuits. To operate at very low bias currents, a simple and compact high resistance load device has been introduced. Operating in subthreshold ...

2007

Fault-Tolerant Multi-Level Logic Decoder for Nanoscale Crossbar Memory Arrays

Didier Bouvet, Yusuf Leblebici, Mihai Adrian Ionescu, Kirsten Emilie Moselund, Giovanni De Micheli, David Atienza Alonso, Mohamed Haykel Ben Jamaa

Several technologies with sub-lithographic features are targeting the fabrication of crossbar memories in which the nanowire decoder is playing a major role. In this paper, we suggest a way to reduce the decoder size and keep it defect tolerant by using mu ...

2007

Three-dimensional Tip Electrode Array Technology for High Resolution Neuro-Electronic Systems used in Electrophysiological Experiments in-vitro

Alexandre Schmid, Yusuf Leblebici, Neil Joye, Maurizio Lavagnino

A three-dimensional tip electrode array technology for in-vitro electrophysiological experiments is presented. Based on simulation results obtained with a finite element model of the neuron-electrode interface, it has been shown that the electrical couplin ...

2007

Ultra low power subthreshold current-mode logic utilizing a novel PMOS load device

Eric Vittoz, Yusuf Leblebici, Seyed Armin Tajalli

A novel approach for implementing MOS current-mode logic (MCML) circuits that can operate with ultra low bias currents is introduced. Measurements of test structures fabricated in 0.18 μm CMOS technology show that the proposed PMOS load device concept can ...

2007

Tradeoffs in Design of Low-Power Gated-Oscillator CDR Circuits

Paul Victor Georges Muller, Yusuf Leblebici, Seyed Armin Tajalli

This article describes some techniques for implementing low- power clock and data recovery (CDR) circuits based on gated- oscillator (GO) topology for short distance applications. Here, the main tradeoffs in design of a high performance and power-efficient ...

2007

Tri-State Buffer/Bus Driver Circuits in MOS Current-Mode Logic

Yusuf Leblebici, Stéphane Badel

In this paper, two circuits are proposed to implement tri-state buffers/bus drivers for MOS Current-Mode Logic digital circuits. The first is a switch-based, fully differential circuit, while the second is a voltage follower-based, pseudodifferential circu ...

IEEE2007

On-Line Global Energy Optimization in Multi-Core Systems Using Principles of Analog Computation

Eric Vittoz, Yusuf Leblebici, Zeynep Toprak Deniz

This work presents the design and the silicon implementation of an on-line energy optimizer unit based on novel analog computation approaches, which is capable of dynamically adjusting power supply voltages and operating frequencies of multiple processing ...

2007

Toward a bio-inspired image processor for edge extraction with single-electron devices

Alexandre Schmid, Yusuf Leblebici

2007

ASIC for High-Speed-Gating and Free Running Operation of SPADs

Alexandre Pauchard, Yusuf Leblebici, Grégoire Ribordy, Alexis Rochas

Single photon detection at telecom wavelengths is of importance in many industrial applications ranging from quantum cryptography, quantum optics, optical time domain reflectometry, non-invasive testing of VLSI circuits, eye-safe LIDAR to laser ranging. In ...

2007

Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage

Yusuf Leblebici, Stéphane Badel

In this paper, we study the operation of MOS current-mode logic (MCML) gates at lower-than-nominal supply voltages.We show that power can be traded for speed by reducing the supply voltage below the nominal value, while the power-delay product stays nearly ...

2007

Predictable System Interconnects Through an Accurate Early Wire Characterization

Yusuf Leblebici, Stéphane Badel, Ilhan Hatirnaz

2007

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