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Concept

Circuit logique programmable

Publications associées (32)

Request, Coalesce, Serve, and Forget: Miss-Optimized Memory Systems for Bandwidth-Bound Cache-Unfriendly Applications on FPGAs

Paolo Ienne, Mikhail Asiatici

Applications such as large-scale sparse linear algebra and graph analytics are challenging to accelerate on FPGAs due to the short irregular memory accesses, resulting in low cache hit rates. Nonblocking caches reduce the bandwidth required by misses by re ...

ASSOC COMPUTING MACHINERY2022

Utilizing XMG-based Synthesis to Preserve Self-Duality for RFET-Based Circuits

Giovanni De Micheli, Heinz Riener, Alessandro Tempia Calvino, Akash Kumar

Individual transistors based on emerging reconfigurable nanotechnologies exhibit electrical conduction for both types of charge carriers. These transistors (referred to as Reconfigurable Field-Effect Transistors (RFETs)) enable dynamic reconfiguration to d ...

2022

Integrated electronic device with embedded microchannels and a method for producing thereof

Elison de Nazareth Matioli, Remco Franciscus Peter van Erp

The present invention relates to a method for fabricating an integrated electronic device with a microchannel, comprising the steps of: - Providing a homogeneous or heterogeneous substrate with one or more layers of material, respectively; - Forming at lea ...

2021

Silicon photonic microelectromechanical phase shifters for scalable programmable photonics

Niels Quack, Alain Yuji Takabayashi, Hamed Sattari

Programmable photonic integrated circuits are emerging as an attractive platform for applications such as quantum information processing and artificial neural networks. However, current programmable circuits are limited in scalability by the lack of low-po ...

OPTICAL SOC AMER2021

Synthesizing General-Purpose Code Into Dynamically Scheduled Circuits

Paolo Ienne, Andrea Guerrieri, Lana Josipovic

Since their inception more than thirty years ago, field-programmable gate arrays (FPGAs) have been widely used to implement a myriad of applications from different domains. As a result of their low-level hardware reconfigurability, FPGAs have much faster d ...

2021

Low-Latency High-Bandwidth Circuit and System Design for Trigger Systems in High Energy Physics

Marcos Vinícius Silva Oliveira

The increasing luminosity in HEP (High Energy Physics) colliders demands trigger systems to be more selective. First, more information from the detector is routed to the trigger system. Second, larger parts of this information are processed together. These ...

EPFL2021

Optimization Methods for Control: From Embedded Programmable Hardware to Data-Driven Process Optimization

Harsh Ambarishkumar Shukla

The research community has been making significant progress in hardware implementation, numerical computing and algorithm development for optimization-based control. However, there are two key challenges that still have to be overcome for optimization-base ...

EPFL2021

JPEG XS-A New Standard for Visually Lossless Low-Latency Lightweight Image Coding

Touradj Ebrahimi

Joint Photographic Experts Group (JPEG) XS is a new International Standard from the JPEG Committee (formally known as ISO/International Electrotechnical Commission (IEC) JTC1/SC29/WG1). It defines an interoperable, visually lossless low-latency lightweight ...

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC2021

Intrinsic switching in Si-doped HfO2: A study of Curie-Weiss law and its implications for negative capacitance field-effect transistor

Mihai Adrian Ionescu, Igor Stolichnov, Ali Saeidi, Matteo Cavalieri, Teodor Rosca, Carlotta Gastaldi, Sadegh Kamaei Bahmaei, Eamon Patrick O'Connor

HfO2-based ferroelectrics are considered a promising class of materials for logic and memory applications due to their CMOS compatibility and ferroelectric figures of merit. A steep-slope field-effect-transistor (FET) switch is a device for logic applicati ...

AMER INST PHYSICS2021

Algebraic and Boolean Optimization Methods for AQFP Superconducting Circuits

Giovanni De Micheli, Heinz Riener, Eleonora Testa, Siang-Yun Lee

Adiabatic quantum-flux-parametron (AQFP) circuits are a family of superconducting electronic (SCE) circuits that have recently gained growing interest due to their low-energy consumption, and may serve as alternative technology to overcome the down-scaling ...

IEEE2021

A High-Level Synthesis Flow for the Implementation of Iterative Stencil Loop Algorithms on FPGA Devices

David Atienza Alonso, Ivan Beretta, Alessandro Antonio Nacci

The automatic generation of hardware implementations for a given algorithm is generally a difficult task, especially when data dependencies span across multiple iterations such as in iterative stencil loops (ISLs). In this paper, we introduce an automatic ...

IEEE/ACM Press2013

Energy-Efficient Design Techniques for High-Speed Wireline Serial Links

Firat Çelik

The exponential growth in computing power and multimedia services has caused a tremendous increase in data traffic in recent years. This increase in data traffic brings a strong demand for data bandwidth of electrical input/output (I/O) links and pushes th ...

EPFL2021