The rapid growth of edge computing, wearable electronics, and Internet-of-Things (IoT) applications is driving demand for microsystems that can locally perform data processing, storage, and intelligent decision-making.
These systems must be compact, energy-efficient, and capable of integrating multiple functions within strict area and power constraints
. Conventional architectures that physically separate energy storage, memory, and logic increasingly face limitations in footprint, latency, and efficiency. This thesis investigates CMOS-compatible material platforms and device concepts that enable multifunctionality within a unified framework.
The first phase focuses on vertically aligned carbon nanotube (CNT) electrodes for on-chip energy storage. Structural optimization combined with plasma-induced nitrogen functionalization enhanced both electric double-layer and pseudocapacitive behavior, delivering an areal capacitance of approximately 8.5mF/cm2 at 10mV/s, a 35% increase over pristine CNTs.
Nyquist analysis revealed a charge-transfer resistance reduction from 1.2~Ω to 0.7~Ω, while Trasatti decomposition indicated a pseudocapacitive contribution exceeding 60%.
However, integration barriers, such as limited patterning precision and backend process compatibility, ultimately constrain the scalability of CNT-based microsystems.
To overcome these challenges, the thesis pivots to hafnia-based ferroelectric (FE) and antiferroelectric (AFE) thin films, which combine intrinsic multifunctionality with full CMOS process compatibility.
The work exploits electric-field-driven phase transitions and polarization dynamics to realize energy storage, tunable dielectric properties, multilevel non-volatile memory, and neuromorphic functionalities in scalable architectures.
A key outcome is the development of multilayer AFE capacitors in which controlled silicon doping tunes the FE--AFE phase boundary, while ultrathin dielectric interlayers engineer built-in fields and stabilize interfaces.
This architecture achieves a recoverable energy density of 40.2~J/cm3 with 82% efficiency, a tunable permittivity range from 30 to 65 depending on applied field, and stable 2-bit polarization states maintained over 108 switching cycles. These attributes enable compact and reconfigurable energy--information microsystems.
Extending toward ultra-low-power computing, the thesis demonstrates ferroelectric (FeFET) and antiferroelectric (AFeFET) field-effect transistors based on two-dimensional (2D) MoS2 channels in metal--ferroelectric--insulator--semiconductor (MFIS) gate stacks. These devices achieve an endurance beyond 1012 cycles, multilevel conductance states with >107 on/off ratio, and spike-timing-dependent plasticity (STDP) with energy consumption of 0.1pJ for short-term memory and 0.15pJ for long-term memory per spike. Demonstrated pattern recognition in a Hopfield network reached 97.8% accuracy under noisy input
