Charge-Based MOS Transistor Modeling - The EKV Model for Low-Power and RF IC Design

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This paper introduces a novel integration method of localized metallic back-gates into fully-depleted silicon-on-insulator (FDSOI) multi-gate FETs, enabling robust front-to-back electrostatic coupling from room temperature to cryogenic conditions, without ...

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Charge-Based MOS Transistor Modeling - The EKV Model for Low-Power and RF IC Design

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Nanomole Process: Enabling Localized Metallic Back-Gates for Enhanced Cryogenic Front-to-Back Coupling in FDSOI Quantum Dots

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Satisfiability-Based Methods for Digital Circuit Design, Debug, and Optimization

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Ultra Low Voltage Synthesizable Memories: A Trade-Off Discussion in 65 nm CMOS

Real-Time Label-Free Direct Electronic Monitoring of Topoisomerase Enzyme Binding Kinetics on Graphene

Nanoelectromechanical digital logic circuits using curved cantilever switches with amorphous-carbon-coated contacts

Scanning Laser-Beam-Induced Current Measurements of Lateral Transport Near-Junction Defects in Silicon Heterojunction Solar Cells

Integrated Hall Magnetic Angle Sensors

High throughput screening platform for ultra large scale integration based on high-k silicon nanowire ISFET and 3D integration

9 MHz vibrating body FET tuning fork oscillator

Dynamic Thermal Management in 3D Multicore Architectures

Toward a low-voltage multiferroic transistor: Magnetic (Ga,Mn)As under ferroelectric control

Subthreshold Source-Coupled Logic Circuits for Ultra Low Power Applications

Three-axis teslameter with integrated hall probe free from the planar hall effect