Publication

A 3.1mW 8b 1.2GS/s Single-Channel Asynchronous SAR ADC with Alternate Comparators for Enhanced Speed in 32nm Digital SOI CMOS

Yusuf Leblebici, Lukas Kull, Thomas Toifl
2013
Conference Papers

Abstract

An 8b 1.2GS/s single-channel SAR converter is implemented in 32nm CMOS, achieving 39.3dB SNDR and a FOM of 34fJ/conversion-step. High-speed operation is achieved by converting each sample with two alternating comparators clocked asynchronously and a redundant capacitive DAC with constant common mode. Background comparator offset compensation is implemented. The ADC consumes 3.1mW from a 1V supply and occupies 0.0015mm2.

Official source

https://infoscience.epfl.ch/entities/publication/54ad99b0-15fd-42f3-ac05-3084963543f3

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Yusuf Leblebici, Lukas Kull, Thomas Toifl
2013
Conference Papers

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/54ad99b0-15fd-42f3-ac05-3084963543f3

About this result

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