Publication

Programmable code processor for software defined radio

2003
Conference Papers

Abstract

This paper describes a flexible processor capable of producing binary codes for various standards such as UNITS and 802.11b. Its field of application lies in base-stations and in future software defined radio terminals. Because of its flexibility just one or two instances may be integrated into a SoC (System on Chip) where multiple codes are needed. This approach adds flexibility compared to a dedicated code generating structure where the class of codes is fixed. Specialized Bit-ALUs allow to address multiple bits of a register and to operate simultaneously on them. Instructions tailored for code generation enhance its efficiency considerably. The processor was successfully integrated and tested in a 0.25mum 5ML CMOS process.

Official source

https://infoscience.epfl.ch/entities/publication/36065bbd-789a-46dd-9f4b-934c131536c0

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2003
Conference Papers

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/36065bbd-789a-46dd-9f4b-934c131536c0

About this result

Related concepts (32)

Software-defined radio

Software-defined radio (SDR) is a radio communication system where components that conventionally have been implemented in analog hardware (e.g. mixers, filters, amplifiers, modulators/demodulators, detectors, etc.) are instead implemented by means of software on a personal computer or embedded system. While the concept of SDR is not new, the rapidly evolving capabilities of digital electronics render practical many processes which were once only theoretically possible.

Digital signal processor

A digital signal processor (DSP) is a specialized microprocessor chip, with its architecture optimized for the operational needs of digital signal processing. DSPs are fabricated on MOS integrated circuit chips. They are widely used in audio signal processing, telecommunications, , radar, sonar and speech recognition systems, and in common consumer electronic devices such as mobile phones, disk drives and high-definition television (HDTV) products. The goal of a DSP is usually to measure, filter or compress continuous real-world analog signals.

Cell (processor)

Cell is a 64-bit multi-core microprocessor microarchitecture that combines a general-purpose PowerPC core of modest performance with streamlined coprocessing elements which greatly accelerate multimedia and vector processing applications, as well as many other forms of dedicated computation. It was developed by Sony, Toshiba, and IBM, an alliance known as "STI". The architectural design and first implementation were carried out at the STI Design Center in Austin, Texas over a four-year period beginning March 2001 on a budget reported by Sony as approaching US$400 million.

Related publications (6)

Programmable code processor for software defined radio

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