Publication

A Discrete-Time Analog Compute Macro for Edge ML with 200 TOPS/W in CMOS 28nm

2026

Abstract

A signed analog precision Multiply-and-Accumulate (MAC) macro, targeted for edge computing, is introduced and fabricated in CMOS 28 nm technology. Scalability of Computing-in-memory (CIM) faces challenges due to complexities in implementing high bit-precision compute units. This work addresses scalability by pushing computations to analog domain and transferring data between MAC layers in a discrete time pipelined manner, removing the need for per-cycle memory read and write operations. The proposed analog MAC circuit improves system energy-efficiency and latency by removing some of the complex operations in the conventional CIMs, such as partial-sum operations, data converters, shift and add, and memory access in multiple cycles. Due to its discrete-time nature, operation per-kernel can be scaled up as desired by tuning the supply voltage, making this work more suited for power-performance scalable Deep Neural Networks (DNNs). The proposed system achieves 200 TOPS/W and 6 GOPS per MAC in energy-efficient and high-performance modes respectively, enabling 10× and 30× improvement in energy efficiency and throughput over the state-of the-art MAC units with 8-bit operand precision.

Official source

https://infoscience.epfl.ch/entities/publication/3f0bbca3-1af4-4492-a7ef-f03b8af06c4d

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2026

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/3f0bbca3-1af4-4492-a7ef-f03b8af06c4d

About this result

Related concepts (32)

Direct memory access

Direct memory access (DMA) is a feature of computer systems that allows certain hardware subsystems to access main system memory independently of the central processing unit (CPU). Without DMA, when the CPU is using programmed input/output, it is typically fully occupied for the entire duration of the read or write operation, and is thus unavailable to perform other work. With DMA, the CPU first initiates the transfer, then it does other operations while the transfer is in progress, and it finally receives an interrupt from the DMA controller (DMAC) when the operation is done.

Dynamic random-access memory

Dynamic random-access memory (dynamic RAM or DRAM) is a type of random-access semiconductor memory that stores each bit of data in a memory cell, usually consisting of a tiny capacitor and a transistor, both typically based on metal–oxide–semiconductor (MOS) technology. While most DRAM memory cell designs use a capacitor and transistor, some only use two transistors. In the designs where a capacitor is used, the capacitor can either be charged or discharged; these two states are taken to represent the two values of a bit, conventionally called 0 and 1.

Arbitrary-precision arithmetic

In computer science, arbitrary-precision arithmetic, also called bignum arithmetic, multiple-precision arithmetic, or sometimes infinite-precision arithmetic, indicates that calculations are performed on numbers whose digits of precision are limited only by the available memory of the host system. This contrasts with the faster fixed-precision arithmetic found in most arithmetic logic unit (ALU) hardware, which typically offers between 8 and 64 bits of precision.

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A Discrete-Time Analog Compute Macro for Edge ML with 200 TOPS/W in CMOS 28nm

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