Publication

An order-statistics-inspired, fully-digital readout approach for analog SiPM arrays

Edoardo Charbon, Esteban Venialgo Araujo
2018
Conference Papers

Abstract

In this paper we present a silicon photomultiplier (SiPM) readout system based on a field-programmable gate array (FPGA), which is capable of converting any commercial 16-channel analog SiPM array into a hybrid device with fully-digital readout for application in time of flight positron emission tomography (TOF-PET). In principle this hybrid SiPM array can be implemented with several leading edge discriminators (LEDs) per channel, so that multiple timestamps can be acquired per scintillation pulse allowing to estimate the time of interaction more robustly than if a single timestamp is used. These concepts were studied experimentally in two different ways. In the first approach, we utilized discrete components in combination with an array of time-to-digital converters (TDCs) implemented and validated on the FPGA. The overall resolution of each channel was 56 ps FWHM or better, while crosstalk was undetectable. In the second approach, we utilized a four-channel high-speed acquisition board operating at 5 GSPS and emulated a multiple-LED acquisition by post-processing the digitized waveforms. We present, for the first time, experimental results obtained with the best linear unbiased estimator (BLUE) to estimate the time of interaction from the multiple timestamps.

Official source

https://infoscience.epfl.ch/entities/publication/2f86ac2e-c86a-4c1e-9fad-78e42d6f4e6c

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Edoardo Charbon, Esteban Venialgo Araujo
2018
Conference Papers

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/2f86ac2e-c86a-4c1e-9fad-78e42d6f4e6c

About this result

Related concepts (32)

Field-programmable gate array

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured after manufacturing. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools. FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable interconnects allowing blocks to be wired together.

Programmable logic array

A programmable logic array (PLA) is a kind of programmable logic device used to implement combinational logic circuits. The PLA has a set of programmable AND gate planes, which link to a set of programmable OR gate planes, which can then be conditionally complemented to produce an output. It has 2N AND gates for N input variables, and for M outputs from PLA, there should be M OR gates, each with programmable inputs from all of the AND gates. This layout allows for many logic functions to be synthesized in the sum of products canonical forms.

Gate array

A gate array is an approach to the design and manufacture of application-specific integrated circuits (ASICs) using a prefabricated chip with components that are later interconnected into logic devices (e.g. NAND gates, flip-flops, etc.) according to custom order by adding metal interconnect layers in the factory. It was popular during the upheaval in the semiconductor industry in the 1980s, and its usage declined by the end of the 1990s.

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An order-statistics-inspired, fully-digital readout approach for analog SiPM arrays

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