Publication

The Embryonics Project: Specifications of the Muxtree Fields Programmable Gate Array

Daniel Mange, Gianluca Tempesti, Lucian Prodan
2002
Reports

Abstract

As new techniques for applying biological processes to the development of computer hardware reach maturity, the EMBRYONICS (for embryonic electronics) project gains in complexity and flexibility of use. New features, such as the capability to more efficiently store data, have lately been added to MUXTREE® (for multiplexer tree) - our electronic molecule. A side effect to the flexibility added to the new molecule is the need for different binary configurations in order to differentiate the possible operating modes. This document is intended as a summary of the final specifications of MUXTREE® necessary to be able to effectively use the molecules as a programmable circuit.

Official source

https://infoscience.epfl.ch/entities/publication/0558f5ff-846a-47cc-b07a-dc717d264676

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Daniel Mange, Gianluca Tempesti, Lucian Prodan
2002
Reports

Abstract

Official source

https://infoscience.epfl.ch/entities/publication/0558f5ff-846a-47cc-b07a-dc717d264676

About this result

Related concepts (32)

Programmable logic device

A programmable logic device (PLD) is an electronic component used to build reconfigurable digital circuits. Unlike digital logic constructed using discrete logic gates with fixed functions, a PLD has an undefined function at the time of manufacture. Before the PLD can be used in a circuit it must be programmed to implement the desired function. Compared to fixed logic devices, programmable logic devices simplify the design of complex logic and may offer superior performance.

Field-programmable gate array

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured after manufacturing. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools. FPGAs contain an array of programmable logic blocks, and a hierarchy of reconfigurable interconnects allowing blocks to be wired together.

Circuit underutilization

Circuit underutilization also chip underutilization, programmable circuit underutilization, gate underutilization, logic block underutilization refers to a physical incomplete utility of semiconductor grade silicon on a standardized mass-produced circuit programmable chip, such as a gate array type ASIC, an FPGA, or a CPLD. In the example of a gate array, which may come in sizes of 5,000 or 10,000 gates, a design which utilizes even 5,001 gates would be required to use a 10,000 gate chip.

Related publications (4)

The Embryonics Project: Specifications of the Muxtree Fields Programmable Gate Array

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