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Yusuf Leblebici

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Related publications (405)

Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs

Paolo Ienne, Yusuf Leblebici, Ajay Kumar Verma, Philip Brisk, Panagiotis Athanasopoulos, Alessandro Cevrero, Hadi Parandeh Afshar

The Field Programmable Counter Array (FPCA) was introduced to improve FPGA performance for arithmetic circuits. An FPCA is a reconfigurable IP core that can be integrated into an FPGA. To exploit the FPCA, a circuit is transformed by merging disparate addi ...

ACM2008

Reverse Vgs Static CMOS (RVGS-SCMOS); A New Technique for Dynamically Compensating the Process Variations in Sub-threshold Designs

Yusuf Leblebici, Bahman Kheradmand Boroujeni

2008

Three-Dimensional Silicon-based MEA with High Spatial Resolution

Alexandre Schmid, Yusuf Leblebici, Neil Joye

A new approach based on three-dimensional tip electrodes has been developed as a way to increase the electrical oupling between the neural cells and the individual sensors in a microelectrode array (MEA). With respect to standard planar electrodes, the ele ...

2008

Energy Efficiency Comparison of Asynchronous and Synchronous Circuits Operating in the Sub-Threshold Regime

Yusuf Leblebici, Omer Can Akgun

Digital circuits operating in the sub-threshold regime are able to perform minimum energy operation at a given delay. In the sub-threshold regime circuit delay, hence the leakage energy consumption depends on the supply voltage exponentially. By reducing t ...

2008

Optimization of nanoelectronic systems' reliability under massive defect density using Cascaded R-fold modular redundancy

Alexandre Schmid, Yusuf Leblebici, Milos Stanisavljevic

The theoretical analysis of R-fold modular redundancy, cascaded R-fold modular redundancy and NAND multiplexing is presented and these fault-tolerant techniques are compared in terms of resistance to massive levels of defect density. Optimal cluster size a ...

2008

Programmable Logic Circuits based on Ambipolar CNFET

Yusuf Leblebici, Giovanni De Micheli, David Atienza Alonso, Mohamed Haykel Ben Jamaa

Recently, it was demonstrated that the polarity of carbon nanotube field effect transistors can be electrically controlled. In this paper we show how Programmable Logic Arrays (PLA) can be built out of these devices, and we illustrate how they outperform u ...

2008

Subthreshold Source-Coupled Logic Circuits for Ultra Low Power Applications

Eric Vittoz, Yusuf Leblebici, Seyed Armin Tajalli

This article presents a novel approach for implementing ultra-low power digital components and systems using source-coupled logic (SCL) circuit topology, operating in weak inversion (sub-threshold) regime. PMOS transistors with shorted drain-substrate cont ...

2008

Implementing Ultra-high-Value Floating Tunable CMOS Resistors

Yusuf Leblebici, Seyed Armin Tajalli

A compact high-value ﬂoating resistor utilising PMOS devices in the subthreshold region is introduced. A test chip has been fabricated in 0.18 um CMOS technology to verify the proposed concept. This technique has been applied to design a reconﬁgurable sixt ...

2008

A Subthreshold SCL Based Pipelined Encoder for Ultra-Low Power 8-bit Folding/Interpolating ADC

Yusuf Leblebici, Seyed Armin Tajalli, Mohammad Beikahmadi

The subthreshold MOS source-coupled logic (STSCL) technique is of great interest for designing ultra low power circuits. In this paper we discuss the design of a pipelined encoder for an 8-bit folding and interpolating (F&I) analog-to-digital (ADC) data co ...

NORCHIP2008

Prospects for logic-on-a-wire

Didier Bouvet, Yusuf Leblebici, Mihai Adrian Ionescu, Kirsten Emilie Moselund, Giovanni De Micheli, David Atienza Alonso, Mohamed Haykel Ben Jamaa

In this paper we present the top-down fabrication of gate-all-around (GAA) and body-tied @W-gate devices by a combination of etching and oxidation steps resulting in a local silicon-on-insulator structure. The GAA has advantages in terms of enhanced curren ...

2008

Implementation of early vision model for edge extraction with single-electron devices

Alexandre Schmid, Yusuf Leblebici

2008

Adaptive Vgs: A Novel Technique for Controlling Power and Delay of Logic Gates in Sub-VT Regime

Yusuf Leblebici, Bahman Kheradmand Boroujeni

2008

Design Space Exploration for Field Programmable Compressor Trees

Paolo Ienne, Yusuf Leblebici, Philip Brisk, Alessandro Cevrero

2008

Improving the Power-Delay Product in SCL Circuits Using Source Follower Output Stage

Yusuf Leblebici, Seyed Armin Tajalli

This article explores the effect of using source follower buffers (SFB) at the output of source coupled logic (SCL) circuits. This technique can help to improve the power-delay product (PDP) in an SCL gate by a factor close to two. The proposed approach ha ...

IEEE2008

Three-dimensional Tip Electrode Array Technology for High Resolution Neuro-Electronic System used in Electrophysiological Experiments in-vitro

Alexandre Schmid, Yusuf Leblebici, Neil Joye, Maurizio Lavagnino

A three-dimensional tip electrode array technology for in- vitro electrophysiological experiments is presented. Based on simulation results obtained with a finite element model of the neuron-electrode interface, it has been shown that the electrical coupli ...

2008

Novel Front-End Circuit Architectures for Integrated Bio-Electronic Interfaces

Alexandre Schmid, Yusuf Leblebici, Carlotta Guiducci

2008

CMOS realization of two-dimensional mixed analog-digital Hamming distance discriminator circuits for real-time imaging applications

Alexandre Schmid, Yusuf Leblebici, Stéphane Badel

The architecture of an integrated Hamming artificial neural network, and its use as a versatile signal/image processing circuit is presented. The circuit operation relies oil the charge-based processing of sum-of-products terms, complemented with digital p ...

2008

Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories

Didier Bouvet, Yusuf Leblebici, Mihai Adrian Ionescu, Kirsten Emilie Moselund, Giovanni De Micheli, David Atienza Alonso, Mohamed Haykel Ben Jamaa

The fabrication of crossbar memories with sublithographic features is expected to be feasible within several emerging technologies; in all of them, the nanowire (NW) decoder is a critical part since it bridges the sublithographic wires to the outer circuit ...

2008

Development of a Bond Graph Based Model of Computation for SystemC-AMS

Alain Vachoux, Yusuf Leblebici, Torsten Mähne

The modelling and simulation capabilities of SystemC-AMS concerning conservative continuous time systems involving the interaction of several physical domains and with digital control components are currently limited. Bond graphs unify the description of m ...

2008

Toward a single-electron image processor for edge detection based on the inner retina model

Alexandre Schmid, Yusuf Leblebici

2008

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