Publications by Maher Kayal | EPFL Graph Search

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If an analog-to-digital converter (ADC) is used within a ΣΔ converter such that the loop filter is mixed signal, then the ADC does not need to have the full resolution of the ΣΔ converter, and its input values will not be uniformly distributed over the input range. In this paper, we argue that the best input distribution to use as a general model is the maximumentropy distribution (for location parameters: the Gaussian distribution). We then describe an externally linear ADC with non-linearly spaced decisio

This letter presents a CMOS-compatible photodetector displaying direct light-to-time conversion and intrinsic charge integration with a very low dark current. This device is particularly adapted for applications requiring high sensitivity such as biolumine ...

This paper presents a modeling strategy to simulate the propagation of electrical perturbations induced by direct biasing of substrate junctions. Usually, this is done by identifying parasitic substrate devices such as bipolar transistors. However, mapping ...

Presented is a transistor-level implementation of a floating and tunable CMOS active inductor. It is based on the classical gyrator-C topology and is enhanced by adding an internal offset reduction mechanism to guarantee functionality also for unbalanced D ...

In this paper, an oscillator based on a Vibrating Body Field Effect Transistor (VB-FET) working at 9.4MHz is presented. The electrical characteristics of this active MEM resonator are detailed for static and dynamic operation. The benefit of the intrinsic ...

This paper presents a new modeling methodology accounting for generation and propagation of minority carriers that can be used directly in circuit-level simulators in order to estimate coupled parasitic currents. The method is based on a new compact model ...

This paper presents a detailed analysis of CSL (Current Steering Logic) [1] and compares its characteristics with FSCL (Folded Source Coupled Logic) [1,2,3], two logic families intended to be applied in mixed-mode CMOS circuits. These logic families generate small current spikes compared to the CMOS static family. They feature high robustness to process fluctuations, and are capable to operate at low quiescent current and power supply voltage. Simulation results, based on ES2 0.7 CMOS low voltage technology

This paper presents a MEMS-based 5th-order Delta Sigma capacitive accelerometer. The Delta Sigma loop is implemented in mixed signal, the global 5th-order filter having a 2nd-order analog and a 3rd-order digital part. The system can be used with a wide range of sensors, because the mixed-signal front-end is programmable. The developed ASIC comprises a voltage-mode preamplifier, two parallel demodulators implementing CDS, and a 7-bit internally non-linear flash ADC. The latter drives a 3rd-order digital filt

In this paper, a fully automated system for source detection of the partial discharges (PD) as an online diagnosis test in rotating machineries is proposed. This technique uses a modified version of the Expectation Maximization-based (EM) clustering techni ...

Aims: To determine the optimal stimulation intensity for frontal stimulation with a modified slit lamp holder and to compare the reliability and symmetry of bone-conducted ocular vestibular evoked myogenic potentials (oVEMPs) using two stimulation sites: f ...

This research presents a transmission line model aimed for the fault location in power systems using a method based on the Electromagnetic Time-Reversal (EMTR). The discrete-time model simulates the waves travelling in the line by means of many unit delays ...

This paper presents a methodology for digitally calibrating analog circuits and systems. Based on the detection of an imperfection by a simple comparator, a successive approximations algorithm tunes a compensation current. The latter is generated by a sub- ...

The current work focuses on presenting specific Hall cells with high performance, and their corresponding parameters. The design, integration, measurements and model development for their performance assessment are necessary stages considered in the genera ...

In order to provide the information on their Hall voltage, sensitivity, and drift with temperature, a new simpler lumped circuit model for the evaluation of various Hall cells has been developed. In this sense, the finite element model proposed by the auth ...

A low-power 14-bits first order incremental Analog-to-Digital Converter (ADC) is presented. Based on the charge balancing principle, this switched-capacitor (SC) circuit integrates the input signal multiple times to reach the targeted resolution, linearity ...

In this paper, we present a new method to measure light intensity in a floating body partially depleted SOI MOSFET. The photo-generated charge density in the MOSFET is converted into a charge pumping frequency needed to maintain the drain current at a cons ...

In this paper, a modeling methodology is validated based on an enhanced model of the diode, that we have developed to simulate substrate current coupling mechanisms on a typical H -bridge structure. An equivalent schematic based on an enhanced model of the ...

has already been proven that analog emulation overcomes the speed limits of numerical simulators by means of a simple fixed-topology prototype. In order to enhance the modularity and the size of the emulated power system a dedicated platform based on a fie ...

This paper presents an integrated Hall sensor microsystem with continuous gain calibration and a current-mode back-end. The integrated system includes a Hall sensor with internal biasing, a fully differential front-end, a preamplifier chain, a voltage-to-c ...

The intelligent building, a major smart city research and development domain, has grown beyond the scope of automation, currently focusing on the occupant centered approaches and the ancillary services offered to the power grid. The Internet of Things (IoT ...

Maher Kayal

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An internally non-linear ADC for a ΣΔ accelerometer loop

MOS-PN Hybrid Device With Minimum Dark Current for Sensitive Digital Photodetection

Global modeling strategy of parasitic coupled currents induced by minority-carrier propagation in semiconductor substrates

Tunable floating active inductor with internal offset reduction

High-quality factor MEMS based oscillator: Silicon 9 MHz oscillator with low phase noise and high quality factor

A circuit-level substrate current model for smart-power ICs

Digital circuit techniques for mixed analog/digital circuits applications

A Navigation-Grade MEMS Accelerometer based on a Versatile Front End

A Novel Technique for Online Partial Discharge Pattern Recognition in Large Electrical Motors

Republication de : Evaluation of bone-conducted oVEMPs using frontal medial and mastoid stimulations

Ultra High-Speed Hardware Emulator for Real-Time Fault Location in Multi-Conductor Power Systems

Methodology for the Digital Calibration of Analog Circuits and Systems Using Sub-binary Radix DACs

Evaluation of characteristic parameters for high performance hall cells

A Circuit Model for CMOS Hall Cells Performance Evaluation including Temperature Effects

A high sensitivity low-power capacitive front-end for insulin injection pens

Transient charge pumping as an efficient technique to measure low light intensity with PD SOI MOSFET

Circuit Level Modeling Methodology of Parasitic Substrate Current Injection from a High-Voltage H-bridge at High Temperature

A mixed-signal platform dedicated to power system dynamic computation

A Hall sensor microsystem with continuous gain calibration using fully integrated references

Towards the next generation of intelligent building: An assessment study of current automation and future IoT based systems with a proposal for transitional design