Lecture

Logic Gates and Hazard Elimination

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In course

EE-110: Logic systems (for MT)

Ce cours couvre les fondements des systèmes numériques. Sur la base d'algèbre Booléenne et de circuitscombinatoires et séquentiels incluant les machines d'états finis, les methodes d'analyse et de synthèse de systèmelogiques sont étudiées et appliquée ...

Description

This lecture covers the implementation of logic gates in semiconductor materials, focusing on TTL and CMOS logic families. It discusses integrated circuits, static and dynamic hazards, gated clocks, real D flip-flops, metastability, critical paths, and switch debouncing. The presentation also delves into static-1 and static-0 hazards, their elimination using Karnaugh maps, and the concept of metastability. Additionally, it explores the theory of zero-delay models in complex logic circuits, addressing dynamic hazards and the behavior of D flip-flops. The lecture concludes with insights into ALUs, counters, shift registers, ring counters, Johnson counters, and linear feedback shift registers.

Instructor

Alexandre Schmid

Alexandre Schmid received the M.Sc. degree in microengineering and the Ph.D. degree in electrical engineering from the Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland, in 1994 and 2000, respectively. Since 1994, he has been with the EPFL, working with the Integrated Systems Laboratory as a Research and Teaching Assistant, and with the Electronics Laboratories as a Postdoctoral Fellow. In 2002, he was a Senior Research Associate with the Microelectronic Systems Laboratory, where he has been conducting research in the fields of bioelectronic interfaces and implantable biomedical electronics, nonconventional signal processing and neuromorphic hardware, and reliability of nanoelectronic devices, and also teaches with the Microengineering and Electrical Engineering Departments of EPFL. Since 2011, he is a Maître d'Enseignement et de Recherche (MER) Faculty Member with EPFL. He is a coauthor of two books, Reliability of Nanoscale Circuits and Systems, Methodologies and Circuit Architectures, Springer, 2011, and Wireless Cortical Implantable Systems, Springer, 2013, and a coeditor of one book, as well as over 100 articles published in journals and conferences. Dr. Schmid has served as the General Chair of the Fourth International Conference on Nano-Networks in 2009 and has been serving as an Associate Editor of the Institute of Electrical, Information, and Communication Engineers Electronics Express since 2009.

Official source

Ontological neighbourhood

Computer engineering

Hardware engineering: Microprocessors

Electrical engineering

Electronic engineering: Digital electronics

Related concepts (32)

Counter (digital)

In digital logic and computing, a counter is a device which stores (and sometimes displays) the number of times a particular event or process has occurred, often in relationship to a clock. The most common type is a sequential digital logic circuit with an input line called the clock and multiple output lines. The values on the output lines represent a number in the binary or BCD number system. Each pulse applied to the clock input increments or decrements the number in the counter.

Logic

Logic is the study of correct reasoning. It includes both formal and informal logic. Formal logic is the science of deductively valid inferences or logical truths. It studies how conclusions follow from premises due to the structure of arguments alone, independent of their topic and content. Informal logic is associated with informal fallacies, critical thinking, and argumentation theory. It examines arguments expressed in natural language while formal logic uses formal language.

Ring counter

A ring counter is a type of counter composed of flip-flops connected into a shift register, with the output of the last flip-flop fed to the input of the first, making a "circular" or "ring" structure. There are two types of ring counters: A straight ring counter, also known as a one-hot counter, connects the output of the last shift register to the first shift register input and circulates a single one (or zero) bit around the ring.

Shift register

A shift register is a type of digital circuit using a cascade of flip-flops where the output of one flip-flop is connected to the input of the next. They share a single clock signal, which causes the data stored in the system to shift from one location to the next. By connecting the last flip-flop back to the first, the data can cycle within the shifters for extended periods, and in this configuration they were used as computer memory, displacing delay-line memory systems in the late 1960s and early 1970s.

Formal system

A formal system is an abstract structure used for inferring theorems from axioms according to a set of rules. These rules, which are used for carrying out the inference of theorems from axioms, are the logical calculus of the formal system. A formal system is essentially an "axiomatic system". In 1921, David Hilbert proposed to use such a system as the foundation for the knowledge in mathematics. A formal system may represent a well-defined system of abstract thought.

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Logic Gates and IC Technology

Explores the implementation of logic gates in semiconductor material, focusing on TTL and CMOS technologies, ICs, hazards, clocks, D flip-flops, and switch debouncing.

Logic Systems: Technology Overview

Provides an overview of the technology behind logic gates, covering TTL and CMOS families and addressing static and dynamic hazards, gated clocks, and switch debouncing.

Logic Systems: Karnaugh Maps and TTL Gates

Explores Karnaugh maps, TTL gates, analog aspects of digital logic, and prime implicants.

Logic Systems: Multiplexers and Flip-Flops

Explains SR latch circuits, D-latches, D-flip-flops, clock signals, and multiplexers in logic systems.

Timing Analysis: Synchronous Circuit Design