Lecture

SRAM Memory Architecture & Bit Cell

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In course

EE-429: Fundamentals of VLSI design

The course introduces the fundamentals of digital integrated circuits and the technology aspects from a designers perspective. It focuses mostly on transistor level, but discusses also the extension to large digital semicustom designs. ...

Description

This lecture covers the fundamentals of VLSI design related to SRAM, focusing on array access, bitline conditioning, SRAM bit cell structure, read and write operations, access transistors, and SRAM sizing constraints. It also discusses the operation analysis, optimization, and layout considerations of SRAM cells, as well as the impact of SRAM on Moore's Law.

Instructors (2)

Andreas Peter Burg

Andreas Burg was born in Munich, Germany, in 1975. He received his Dipl.-Ing. degree in 2000 from the Swiss Federal Institute of Technology (ETH) Zurich, Zurich, Switzerland. He then joined the Integrated Systems Laboratory of ETH Zurich, from where he graduated with the Dr. sc. techn. degree in 2006. In 1998, he worked at Siemens Semiconductors, San Jose, CA. During his doctoral studies, he was an intern with Bell Labs Wireless Research for a total of one year. From 2006 to 2007, he held positions as postdoctoral researcher at the Integrated Systems Laboratory and at the Communication Theory Group of the ETH Zurich. In 2007 he co-founded Celestrius, an ETH-spinoff in the field of MIMO wireless communication, where he was responsible for the ASIC development as Director for VLSI. In January 2009, he joined ETH Zurich as SNF Assistant Professor and as head of the Signal Processing Circuits and Systems group at the Integrated Systems Laboratory. In January 2011, he became a Tenure Track Assistant Professor at the Ecole Polytechnique Federale de Lausanne (EPFL) where he is leading the Telecommunications Circuits Laboratory in the School of Engineering. In June 2018 he was promoted to the role of a Tenured Associate Professor. In 2000, Mr. Burg received the Willi Studer Award and the ETH Medal for his diploma and his diploma thesis, respectively. Mr. Burg was also awarded an ETH Medal for his Ph.D. dissertation in 2006. In 2008, he received a 4-years grant from the Swiss National Science Foundation (SNF) for an SNF Assistant Professorship. In his professional career, Mr. Burg was involved in the development of more than 25 ASICs. He is a member of the IEEE and of the European Association for Signal Processing (EURASIP). Research interests and expertise

Circuits and systems for telecommunications (wireless and wired)
Prototyping and silicon implementation of new communication technologies
Development of communication algorithms and optimization for hardware implementation
Low-power VLSI signal processing for communications and other applications
Digital integrated circuits
Circuits for image and video processing

Alexandre Sébastien Julien Willommet

Education 3D high density memory based on emering resistive technologies : circuit and architecture design | Microelectronics 2014 – 2017 CEA-Leti Teaching & PhD Courses Fundamentals of VLSI design EE-429 The course introduces the fundamentals of digital integrated circuits and the technology aspects from a designers perspective. It focuses mostly on transistor level, but discusses also the extension to large digital semicustom designs. Lab in advanced VLSI design

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Related concepts (32)

Transistor

A transistor is a semiconductor device used to amplify or switch electrical signals and power. It is one of the basic building blocks of modern electronics. It is composed of semiconductor material, usually with at least three terminals for connection to an electronic circuit. A voltage or current applied to one pair of the transistor's terminals controls the current through another pair of terminals. Because the controlled (output) power can be higher than the controlling (input) power, a transistor can amplify a signal.

HCMOS

HCMOS ("high-speed CMOS") is the set of specifications for electrical ratings and characteristics, forming the 74HC00 family, a part of the 7400 series of integrated circuits. The 74HC00 family followed, and improved upon, the 74C00 series (which provided an alternative CMOS logic family to the 4000 series but retained the part number scheme and pinouts of the standard 7400 series (especially the 74LS00 series)) . Some specifications include: DC supply voltage DC input voltage range DC output voltage range input rise and fall times output rise and fall times HCMOS also stands for high-density CMOS.

CMOS

Complementary metal–oxide–semiconductor (CMOS, pronounced "sea-moss", siːmɑːs, -ɒs) is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips (including CMOS BIOS), and other digital logic circuits.

Bipolar junction transistor

A bipolar junction transistor (BJT) is a type of transistor that uses both electrons and electron holes as charge carriers. In contrast, a unipolar transistor, such as a field-effect transistor (FET), uses only one kind of charge carrier. A bipolar transistor allows a small current injected at one of its terminals to control a much larger current flowing between the terminals, making the device capable of amplification or switching. BJTs use two p–n junctions between two semiconductor types, n-type and p-type, which are regions in a single crystal of material.

Field-effect transistor

The field-effect transistor (FET) is a type of transistor that uses an electric field to control the flow of current in a semiconductor. FETs (JFETs or MOSFETs) are devices with three terminals: source, gate, and drain. FETs control the flow of current by the application of a voltage to the gate, which in turn alters the conductivity between the drain and source. FETs are also known as unipolar transistors since they involve single-carrier-type operation.

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