Mediaspace scheduled maintenance: Aug 25, 2026 07:00 - 12:00 AM. During this time, videos will be temporarily unavailable. Check status updates.
This lecture discusses memory consistency models and their impact on performance when running custom binaries on different processors. It also covers the differences between Instruction-Level Parallelism (ILP) and Thread-Level Parallelism (TLP), as well as the implementation of atomic subroutines like Compare-And-Swap (CAS) in processors. Furthermore, it explores Transactional Memory properties, GPU architecture, shared memory usage, CUDA kernel execution steps, and GPU memory access patterns. The lecture concludes with a comparison of multithreaded workloads and the suitability of different multithreading granularities for processors.
This video is available exclusively on Mediaspace for a restricted audience. Please log in to MediaSpace to access it if you have the necessary permissions.
Watch on Mediaspace