Course

EE-390(a): Lab on hardware-software digital systems codesign

Summary

This course explores hardware-software co-design techniques to develop heterogeneous embedded systems running Linux on FPGAs. The course applies high-level synthesis tools (HLS) to the design of hardware accelerators that reduce total execution time and energy consumption for complex tasks.

Lectures

Instructors (2)

David Atienza Alonso

David Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.

Miguel Peon Quiros

Official source

Moodle Page

http://go.epfl.ch/EE-390_a

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Summary

Lectures

Instructors (2)

David Atienza Alonso

Miguel Peon Quiros

Official source

Moodle Page

http://go.epfl.ch/EE-390_a

Lectures in this course (7)

LED Effects with Custom IP and HW Support

Explores LED effects design with custom IP and hardware support, covering topics like LED brightness modulation, XILINX Vivado design flow, and connecting top-level ports to FPGA pins.

In-System Debug and Custom AXI IP

Covers in-system debug, marking nets, generating debug IP, and reading from a custom AXI IP.

VGA Adapter

Covers the design of a VGA Adapter for a Pong game project and explains the VGA interface architecture and video signal generation options.

Lab-5: Pong Game

Covers turning a hardware-generated VGA interface into a Pong game.

Project: Video Game

Covers the organization, objectives, project ideas, graphics enhancement, advanced adapters, and alternative interfaces for a video game project.

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