Giovanni De MicheliExpertise
Design technologies for integrated systems on silicon, such as synthesis, hw/sw codesign and low-power design, as well as systems on heterogeneous platforms including electrical and biological components.
Scientific Director of EcoCloud Center at EPFL
Directing activities towards creating sustainable computation including AI.Designing energy-savvy data centers and edge devices.
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Giovanni De Micheli is a research scientist in electronics and Bruno Emanuel Ferreira De Sousa CorreiaThroughout my PhD and postdoctoral studies I was trained in world-renowned laboratories and institutions in the United States of America (University of Washington and The Scripps Research Institute). Very early in my scientific career I found out my fascination about protein structure and function. My PhD studies evolved in the direction of immunogen design and vaccine engineering which sparked my interest in the many needs and opportunities in vaccinology and translational research. My efforts resulted in an enlightening piece of work where for the first time, computationally designed immunogens elicited potent neutralizing antibodies. During my postdoctoral studies I joined a chemical biology laboratory at the Scripps Research Institute. In this stage I developed novel chemoproteomics methods for the identification of protein-small molecule interaction sites in complex proteomes. In March 2015, I joined the École Polytechnique Fédérale de Lausanne (EPFL) – Switzerland as a tenure track assistant professor. The focus of my research group is to develop computational tools for protein design with particular emphasis in applying these strategies to immunoengineering (e.g. vaccine and cancer immunotherapy). The activities in my laboratory focus on computational design methods development and experimental characterization of the designed proteins. Our laboratory has been awarded with 2 prestigious research grants from the European Research Council. Lastly, I have been awarded the prize for best teacher of Life sciences in 2019.
Viktor KuncakViktor Kunčak joined EPFL in 2007, after receiving a PhD degree from MIT. Since then has been leading the Laboratory for Automated Reasoning and Analysis and supervised at least 12 completed PhD theses. His works on languages, algorithms and systems for verification and automated reasoning. He served as an initiator and one of the coordinators of a European network (COST action) in the area of automated reasoning, verification, and synthesis. In 2012 he received a 5-year single-investigator European Research Council (ERC) grant of 1.5M EUR. His invited talks include those at Lambda Days, Scala Days, NFM, LOPSTR, SYNT, ICALP, CSL, RV, VMCAI, and SMT. A paper on test generation he co-authored received an ACM SIGSOFT distinguished paper award at ICSE. A PLDI paper he co-authored was published in the Communications of the ACM as a Research Highlight article. His Google Scholar profile reports an over-approximate H-index of 38. He was an associate editor of ACM Transactions on Programming Languages and Systems (TOPLAS) and served as a co-chair of conferences on Computer-Aided Verification (CAV), Formal Methods in Computer Aided Design (FMCAD), Workshop on Synthesis (SYNT), and Verification, Model Checking, and Abstract Interpretation (VMCAI). At EPFL he teaches courses on functional and parallel programming, compilers, and verification. He has co-taught the MOOC "Parallel Programming" that was visited by over 100'000 learners and completed by thousands of students from all over the world.
Paolo IennePaolo Ienne has been a Professor at the EPFL since 2000 and heads the Processor Architecture Laboratory (LAP). Prior to that, he worked for the Semiconductors Group of Siemens AG, Munich, Germany (which later became Infineon Technologies AG) where he was at the head of the Embedded Memories unit in the Design Libraries division. His research interests include various aspects of computer and processor architecture, FPGAs and reconfigurable computing, electronic design automation, and computer arithmetic. Ienne was a recipient of Best Paper Awards at the 20th, 24th, and 28th ACM/SIGDA International Symposia on Field-Programmable Gate Arrays (FPGA), in 2012, 2016 and 2020, at the 19th and 30th International Conference on Field-Programmable Logic and Applications (FPL), in 2009 and 2020, at the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES), in 2007, and at the 40th Design Automation Conference (DAC), in 2003; many other papers have been candidates to Best Paper Awards in prestigious venues. He has served as general, programme, and topic chair of renown international conferences, including organizing in Lausanne the 26th International Conference on Field-Programmable Logic and Applications (FPL) in 2016. He serves on the steering committee of the IEEE Symposium on Computer Arithmetic (ARITH) and of the International Conference on Field-Programmable Logic and Applications (FPL). Ienne has guest edited a number of special issues and special sections on various topics for IEEE and ACM journals. He is regularly member of program committees of international workshops and conferences in the areas of design automation, computer architecture, embedded systems, compilers, FPGAs, and asynchronous design. He has been an associate editor of ACM Transactions on Architecture and Code Optimization (TACO), since 2015, of ACM Computing Surveys (CSUR), since 2014, and of ACM Transactions on Design Automation of Electronic Systems (TODAES) from 2011 to 2016.
Jaïr Kees Evert Karel CampfensJair Kees Evert Karel Campfens is a doctoral assistant at the HERUS lab. He is an engineer by Eindhoven University of Technology (TU/e) and holds a MSC in Sustainable Energy Technology. Moreover, he holds a double degree MSc in Public Policy & Human Development from Maastricht University and the United Nations University. Education Public Policy & Human Development | Master of Science 2021 – 2022 Maastricht University UNU-MERIT Sustainable Energy Technology | Master of Science
Kamiar AminianKamiar Aminian received the M.S. degree in electrical engineering in 1982, the Ph.D degree in biomedical engineering in 1989 and the Postgraduate degree on technical computing in 1993 from Ecole Polytechnique Fédérale de Lausanne (EPFL). He was assistant professor (1994-1996) with Sharif University of Technology (Tehran). He joint EPFL in 1996 where he is currently Professor of medical instrumentation and the director of the Laboratory of Movement Analysis and Measurement in the Institute of Bioengineering of EPFL. His research interests include methodologies for human movement monitoring and analysis in real world conditions mainly based on wearable technologies and inertial sensors with emphasis on gait, physical activity and sport. His research aims to perform outcome evaluation in orthopaedics, to improve motor function and intervention programs in aging and patients with movement disorders and pain, and to identify metrics of performance in sport science.
Kamiar Aminian is a member of the International Society of Posture and Gait Research, the Institute of Electrical and Electronics Engineers, the European Society of Movement Analysis in Adults and Children, the Prevention of fall Network Europe, the Intentional Society of Biomechanics and the President of the 3D analysis of the human movement group. He is author or co-author of more than 450 scientific papers published in reviewed journals and presented at international conferences and holds 10 patents related to medical devices.
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David Atienza AlonsoDavid Atienza Alonso is an associate professor of EE and director of the Embedded Systems Laboratory (ESL) at EPFL, Switzerland. He received his MSc and PhD degrees in computer science and engineering from UCM, Spain, and IMEC, Belgium, in 2001 and 2005, respectively. His research interests include system-level design methodologies for multi-processor system-on-chip (MPSoC) servers and edge AI architectures. Dr. Atienza has co-authored more than 350 papers, one book, and 12 patents in these previous areas. He has also received several recognitions and award, among them, the ICCAD 10-Year Retrospective Most Influential Paper Award in 2020, Design Automation Conference (DAC) Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He has also earned two best paper awards at the VLSI-SoC 2009 and CST-HPCS 2012 conference, and five best paper award nominations at the DAC 2013, DATE 2013, WEHA-HPCS 2010, ICCAD 2006, and DAC 2004 conferences. He serves or has served as associate editor of IEEE Trans. on Computers (TC), IEEE Design & Test of Computers (D&T), IEEE Trans. on CAD (T-CAD), IEEE Transactions on Sustainable Computing (T-SUSC), and Elsevier Integration. He was the Technical Program Chair of DATE 2015 and General Chair of DATE 2017. He served as President of IEEE CEDA in the period 2018-2019 and was GOLD member of the Board of Governors of IEEE CASS from 2010 to 2012. He is a Distinguished Member of ACM and an IEEE Fellow.
Mihai Adrian IonescuAdrian M. Ionescu is Full Professor at the Swiss Federal Institute of Technology, Lausanne, Switzerland. He received the B.S./M.S. and Ph.D. degrees from the Polytechnic Institute of Bucharest, Romania and the National Polytechnic Institute of Grenoble, France, in 1989 and 1997, respectively. He has held staff and/or visiting positions at LETI-CEA, Grenoble, France and INP Grenoble, France and Stanford University, USA, in 1998 and 1999. Dr. Ionescu has published more than 600 articles in international journals and conferences. He received many Best Paper Awards in international conferences, the Annual Award of the Technical Section of the Romanian Academy of Sciences in 1994 and the Blondel Medal in 2009 for contributions to the progress in engineering sciences in the domain of electronics. He is the 2013 recipient of the IBM Faculty Award in Engineering. He served the IEDM and VLSI conference technical committees and was the Technical Program Committee (Co)Chair of ESSDERC in 2006 and 2013. He is a member of the SATW. He is director of the Laboratory of Micro/Nanoelectronic Devices (NANOLAB).