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Concept

Transistor

Related publications (32)

Strain relaxation and multidentate anchoring in n-type perovskite transistors and logic circuits

Mohammad Khaja Nazeeruddin, Olga Syzgantseva

The engineering of tin halide perovskites has led to the development of p-type transistors with field-effect mobilities of over 70 cm2 V-1 s-1. However, due to their background hole doping, these perovskites are not suitable for n-type transistors. Ambipol ...

Nature Portfolio2024

Active Voltage Balancing with Seamless Integration into Dual Gate Driver for Series Connection of SiC MOSFETs

Drazen Dujic, Rui Wang

The versatility of half-bridge configuration of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) power module contributes to its widespread adoption, highlighting the popularity and significance of its corresponding dual gat ...

2024

Towards Scalable Electronics: Synthetic 2D Materials for Large-Area 2D Circuit Integration

Zhenyu Wang

In the past decades, a significant increase of the transistor density on a chip has led to exponential growth in computational power driven by Moore's law. To overcome the bottleneck of traditional von-Neumann architecture in computational efficiency, effo ...

EPFL2024

A Dual-Channel Gate Driver Design with Active Voltage Balancing Circuit for Series Connection of SiC MOSFETs

Drazen Dujic, Rui Wang

Dual-channel gate driver is commonly utilized in the industry for accommodating the widespread use of half-bridge power modules. As wide-bandgap devices become increasingly prevalent due to their superior switching characteristics compared with conventiona ...

2024

Font Side Solutions for c-Si Solar Cells with High-Temperature Passivating Contacts

Ezgi Genç

In this work, we studied the potential of using thin films deposited by plasma-enhanced chemical vapor deposition (PECVD) for two main purposes: introducing an n-type passivating contact at the front of a TOPCon solar cell, or simplifying the fabrication o ...

EPFL2024

SPAD Developed in 55 nm Bipolar-CMOS-DMOS Technology Achieving Near 90% Peak PDP

Edoardo Charbon, Claudio Bruschini, Francesco Gramuglia, Myung Jae Lee, Ekin Kizilkan, Pouyan Keshavarzian, Won Yong Ha

We present a single-photon avalanche diode (SPAD) developed in 55 nm bipolar-CMOS-DMOS (BCD) technology, which achieves high photon detection probability (PDP) while its breakdown voltage is lower than 20 V. To enhance the PDP performance, the SPAD junctio ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Controlling On-Surface Photoactivity: The Impact of π-Conjugation in Anhydride-Functionalized Molecules on a Semiconductor Surface

Christian Wäckerlin

On-surface synthesis has become a prominent method for growing low-dimensional carbon-based nanomaterials on metal surfaces. However, the necessity of decoupling organic nanostructures from metal substrates to exploit their properties requires either trans ...

Wiley-VCH Verlag GmbH2024

Measuring electrical properties in semiconductor devices by pixelated STEM and off-axis electron holography (or convergent beams vs. plane waves)

Victor Carle Adrien Boureau

We demonstrate the use of both pixelated differential phase contrast (DPC) scanning transmission electron microscopy (STEM) and off-axis electron holography (EH) for the measurement of electric fields and assess the advantages and limitations of each techn ...

Pergamon-Elsevier Science Ltd2024

Phase Shift Angle Segmentation Modulation for Soft-Switching Medium-Voltage DAB Converter With Series-Connected SiC MOSFETs

Chengmin Li

The medium-voltage (MV) dual active bridge (DAB) converter with series-connected SiC (S-SiC) MOSFETs is a promising solution for high-power-density isolated dc/dc converter. To improve the voltage sharing and reliability of S-SiC, relatively large snubber ...

Ieee-Inst Electrical Electronics Engineers Inc2024

Energy-Efficient Electronic Functions Based on the Co-integration of 2D and Ferroelectric Materials

Sadegh Kamaei Bahmaei

The digital revolution has significantly transformed our world over the past decades, driven by the scaling of transistor dimensions and the exponential increase in computation power. However, as the CMOS scaling era approaches its end, the semiconductor i ...

EPFL2023

Accurate Measurement of Dynamic ON-Resistance in GaN Transistors at Steady-State

Elison de Nazareth Matioli, Hongkeng Zhu

Accurate characterization of the dynamic ON-resistance (RON) degradation is important to predict conduction losses for gallium nitride high-electron-mobility transistors (GaN HEMTs). However, even for the same device, many inconsistent results of dynamic R ...

2023

Organic electrochemical transistors printed from degradable materials as disposable biochemical sensors

Danick Briand, Nicolas Francis Fumeaux, Silvia Demuru, Claudio Pinto Almeida

Transient electronics hold promise in reducing electronic waste, especially in applications that require only a limited lifetime. While various degradable electronic and physical sensing devices have been proposed, there is growing interest in the developm ...

Nature Research2023

Ferroelectric Junctionless Double-Gate Silicon-On-Insulator FET as a Tripartite Synapse

Mihai Adrian Ionescu, Igor Stolichnov, Ali Saeidi, Matteo Cavalieri, Carlotta Gastaldi, Sadegh Kamaei Bahmaei

In this work, we report the concept and experimentally demonstrate the first tunable ferroelectric (Fe) junctionless (JL) transistor (Fe-JLFET), capable of emulating the functionality of biological tri-partite synapses, which is an artificial three-termina ...

Institute of Electrical and Electronics Engineers2023

Unraveling the Electrochemical Electrode Coupling in Integrated Organic Electrochemical Transistors

Matteo Cucchi

Organic electrochemical transistors (OECTs) have gained enormous attention due to their potential for bioelectronics and neuromorphic computing. However, their implementation into real-world applications is still impeded by a lack of understanding of the c ...

WILEY-V C H VERLAG GMBH2023

Transcapacitances Modeling in ultra-thin gate-all-around junctionless nanowire FETs, including 2D quantum confinement

Farzan Jazaeri

In this work, we propose an analytical model for the intrinsic transcapacitances in ultra-thin gate-all-around junctionless nanowire field effect transistors in the presence of confined energy states of electrons. The validity of the developed model is con ...

PERGAMON-ELSEVIER SCIENCE LTD2023

Analysis and Design for Medium Voltage Dual Active Bridge Converter Based on Series-Connected SiC MOSFETs

Chengmin Li

In this article, a series-connected SiC MOSFETs-based medium voltage (MV) dual active bridge (DAB) converter featuring a lowvoltage difference amongdevices and high efficiency is proposed. In the developed DAB converter, the zero voltage switching-on chara ...

Ieee-Inst Electrical Electronics Engineers Inc2023

Electrical spectroscopy of defect states and their hybridization in monolayer MoS2

Andras Kis, Oleg Yazyev, Ahmet Avsar, Zhenyu Wang, Yanfei Zhao, Mukesh Kumar Tripathi, Kristians Cernevics, Juan Francisco Gonzalez Marin, Cheol Yeon Cheon, Hyungoo Ji

Defects in solids are unavoidable and can create complex electronic states that can significantly influence the electrical and optical properties of semiconductors. With the rapid progress in the integration of 2D semiconductors in practical devices, it is ...

Nature Research2023

In Liquido Computation with Electrochemical Transistors and Mixed Conductors for Intelligent Bioelectronics

Matteo Cucchi

Next-generation implantable computational devices require long-term-stable electronic components capable of operating in, and interacting with, electrolytic surroundings without being damaged. Organic electrochemical transistors (OECTs) emerged as fitting ...

Wiley-V C H Verlag Gmbh2023

Surfactant behavior and limited incorporation of indium during in situ doping of GeSn grown by molecular beam epitaxy

Anna Fontcuberta i Morral, Andrea Giunto, Thomas Hagger

GeSn is a promising group-IV semiconductor material for on-chip Si photonics devices and high-mobility transistors. These devices require the use of doped GeSn regions, achieved preferably in situ during epitaxy. From the electronic valence point of view, ...

AMER PHYSICAL SOC2023

Fab-to-fab and run-to-run variability in 130 nm and 65 nm CMOS technologies exposed to ultra-high TID

Jean-Michel Sallese, Adil Koukab, Gennaro Termo

The discovery of a large fab-to-fab variability in the TID response of the CMOS technologies used in the design of ASICs for the particle detectors of the HL-LHC triggered a monitoring effort to verify the consistency of the CMOS production process over ti ...

IOP Publishing Ltd2023